GMP used during 3 and a half years to solve MIT's LCS35

Dennis Clarke dclarke at blastwave.org
Fri May 3 19:12:35 UTC 2019


On 5/3/19 5:42 AM, Torbjörn Granlund wrote:
> Bernard Fabrot <bfabrot at gmail.com> writes:
> 
>    And I take it the speedup also comes, in addition from the :
> 
>    64 bit : wow the speedup!
>    clock speed
>    better GMP algos
> 
>    from the fact that some instructions are using less cycles than they used
>    to. I mean: even after the jump from 32 bit to 64 bit: then some 64 bit
>    instructions used less cycles with new CPU generations?
> 
> Some instructions are faster.  GMP's favourite instruction, word integer
> multiply, has become faster, and even more importantly has its
> throughput improved.  (But Pentium 3 had an very well implemented
> multiply instruction.)
> 
> Most instructions take the same time (e.g., plain arithmetic such as
> addition, loads, stores, and branches).
> 
> The IPC has improved by means of a whole array of minor improvements.
> 

Oddly enough I still have running Pentium 2 equipment from Hewlett
Packard and all of gmp and mpfr compile and test fine there.  The speed
seems to be correct based on nothing more than clock rate comparison to
some more modern i7 or even IBM PPC64 equipment.  Sparc however is
simply a horror show given that the assembly simply does not exist.

I will report back on RISC-V rv64imafdc when I have a native gcc
compiler well there.

-- 
Dennis Clarke
RISC-V/SPARC/PPC/ARM/CISC
UNIX and Linux spoken
GreyBeard and suspenders optional


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