[PATCH 2 of 3] Add MIPS32R2 RDHWR-based cycle counter support
tg at gmplib.org
Wed Sep 11 22:27:33 UTC 2019
Mobile Stream <info at mobile-stream.com> writes:
T> Add MIPS32R2 RDHWR-based cycle counter support.
T> Does that work in user mode for all *nix ports?
basing on a quick grep:
openbsd, freebsd seem to only allow ULR but never CC/CCRes;
netbsd seems to enable everything in HWREna including CC, CCRes.
Wait! We're not MIPS system programmers around here!
Can your timing code be used under *nix? I guess from your reply but it
T> Does it not also work in r3, r4, r5? And r6?
the instruction and CP0 HWREna are defined in r3, r5, r6 too.
Then (assuming the cycle counter is usable from outside of the kernel)
I'd suggest that your suggested configuration pattern was a bit too
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