Fat Binary - Haswell Detection Bug (and fix)

John Sully john at csquare.ca
Thu Feb 20 04:59:53 UTC 2014


While testing the latest development code we've discovered that it fails on
specific Pentium D "Haswell" CPUs.  These CPUs are odd in that they don't
have the BMI2 instruction set.  Because of this GMP will crash when it
attempts to execute a MULX.  The specific model is: Intel(R) Pentium(R) CPU
G3420

The proposed patch is:
--- a/mpn/x86_64/fat/fat.c      Sun Feb 16 07:08:24 2014 +0100
+++ b/mpn/x86_64/fat/fat.c      Wed Feb 19 23:47:40 2014 -0500
@@ -292,7 +292,9 @@
              CPUVEC_SETUP_core2;
              CPUVEC_SETUP_coreinhm;
              CPUVEC_SETUP_coreisbr;
-             CPUVEC_SETUP_coreihwl;
+             long featihwm = __gmpn_cpuid (dummy_string, 7);
+             if ( featihwm & (1 << 8) )        //check BMI2
+                     CPUVEC_SETUP_coreihwl;
              break;
            }
          break;

===========================================================

This fix will verify that BMI2 really exists before officially declaring
support for Haswell instructions.

Here is the information from /proc/cpuinfo on the offending CPU:

processor : 0
vendor_id : GenuineIntel
cpu family : 6
model : 60
model name : Intel(R) Pentium(R) CPU G3420 @ 3.20GHz
stepping : 3
microcode : 0x17
cpu MHz : 3199.875
cache size : 3072 KB
physical id : 0
siblings : 2
core id : 0
cpu cores : 2
apicid : 0
initial apicid : 0
fpu : yes
fpu_exception : yes
cpuid level : 13
wp : yes
flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat
pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx pdpe1gb
rdtscp lm constant_tsc arch_perfmon pebs bts rep_good nopl xtopology
nonstop_tsc aperfmperf eagerfpu pni pclmulqdq dtes64 monitor ds_cpl vmx est
tm2 ssse3 cx16 xtpr pdcm pcid sse4_1 sse4_2 movbe popcnt tsc_deadline_timer
xsave rdrand lahf_lm abm arat xsaveopt pln pts dtherm tpr_shadow vnmi
flexpriority ept vpid fsgsbase tsc_adjust erms invpcid
bogomips : 6400.05
clflush size : 64
cache_alignment : 64
address sizes : 39 bits physical, 48 bits virtual
power management:

Thanks!
-John


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