[Gmp-commit] /var/hg/gmp: 5 new changesets
mercurial at gmplib.org
mercurial at gmplib.org
Fri Mar 8 00:05:22 CET 2013
details: /var/hg/gmp/rev/9fdc8749b036
changeset: 15534:9fdc8749b036
user: Torbjorn Granlund <tege at gmplib.org>
date: Fri Mar 08 00:01:13 2013 +0100
description:
(GMP_MULFUNC_CHOICES): Support mul_2 + addmul_2.
details: /var/hg/gmp/rev/99c8817bcd49
changeset: 15535:99c8817bcd49
user: Torbjorn Granlund <tege at gmplib.org>
date: Fri Mar 08 00:02:48 2013 +0100
description:
Rename a label.
details: /var/hg/gmp/rev/fce7d6b7425f
changeset: 15536:fce7d6b7425f
user: Torbjorn Granlund <tege at gmplib.org>
date: Fri Mar 08 00:03:39 2013 +0100
description:
Provide T3/T4 mul_2 and addmul_2.
details: /var/hg/gmp/rev/1dea2e87f1b2
changeset: 15537:1dea2e87f1b2
user: Torbjorn Granlund <tege at gmplib.org>
date: Fri Mar 08 00:04:56 2013 +0100
description:
Cortex A9 gmp-mparam.h.
details: /var/hg/gmp/rev/1f3faeb9f052
changeset: 15538:1f3faeb9f052
user: Torbjorn Granlund <tege at gmplib.org>
date: Fri Mar 08 00:05:18 2013 +0100
description:
*** empty log message ***
diffstat:
ChangeLog | 6 +
configure.ac | 1 +
mpn/arm/tabselect.asm | 5 +-
mpn/arm/v7a/cora9/gmp-mparam.h | 158 +++++++++++++++++++++++++++
mpn/sparc64/ultrasparct3/aormul_2.asm | 197 ++++++++++++++++++++++++++++++++++
5 files changed, 365 insertions(+), 2 deletions(-)
diffs (truncated from 411 to 300 lines):
diff -r 293ed286d8cc -r 1f3faeb9f052 ChangeLog
--- a/ChangeLog Thu Mar 07 07:45:57 2013 +0100
+++ b/ChangeLog Fri Mar 08 00:05:18 2013 +0100
@@ -1,5 +1,11 @@
2013-03-07 Torbjorn Granlund <tege at gmplib.org>
+ * mpn/arm/v7a/cora9/gmp-mparam.h: New file.
+
+ * configure.ac (GMP_MULFUNC_CHOICES): Support mul_2 + addmul_2.
+
+ * mpn/sparc64/ultrasparct3/aormul_2.asm: New file.
+
* mpn/sparc64/ultrasparct3/submul_1.asm: Optimise out two carry
propagating adds.
diff -r 293ed286d8cc -r 1f3faeb9f052 configure.ac
--- a/configure.ac Thu Mar 07 07:45:57 2013 +0100
+++ b/configure.ac Fri Mar 08 00:05:18 2013 +0100
@@ -2776,6 +2776,7 @@
tmp_mulfunc="aors_err3_n" ;;
addcnd_n|subcnd_n) tmp_mulfunc="aorscnd_n" ;;
addmul_1|submul_1) tmp_mulfunc="aorsmul_1" ;;
+ mul_2|addmul_2) tmp_mulfunc="aormul_2" ;;
popcount|hamdist) tmp_mulfunc="popham" ;;
and_n|andn_n|nand_n | ior_n|iorn_n|nior_n | xor_n|xnor_n)
tmp_mulfunc="logops_n" ;;
diff -r 293ed286d8cc -r 1f3faeb9f052 mpn/arm/tabselect.asm
--- a/mpn/arm/tabselect.asm Thu Mar 07 07:45:57 2013 +0100
+++ b/mpn/arm/tabselect.asm Fri Mar 08 00:05:18 2013 +0100
@@ -42,7 +42,8 @@
push {r4-r11, r14}
ldr r11, [sp, #36]
sub r11, r11, r3
-L(out): add r7, r11, r3
+L(outer):
+ add r7, r11, r3
subs r7, r7, #1
sbc r7, r7, r7
mov r6, r0
@@ -88,7 +89,7 @@
str r9, [r6], #4
L(2): subs r3, r3, #1
- bne L(out)
+ bne L(outer)
pop {r4-r11, r14}
bx lr
EPILOGUE()
diff -r 293ed286d8cc -r 1f3faeb9f052 mpn/arm/v7a/cora9/gmp-mparam.h
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/mpn/arm/v7a/cora9/gmp-mparam.h Fri Mar 08 00:05:18 2013 +0100
@@ -0,0 +1,158 @@
+/* gmp-mparam.h -- Compiler/machine parameter header file.
+
+Copyright 1991, 1993, 1994, 1999, 2000, 2001, 2002, 2003, 2009, 2010, 2012,
+2013 Free Software Foundation, Inc.
+
+This file is part of the GNU MP Library.
+
+The GNU MP Library is free software; you can redistribute it and/or modify
+it under the terms of the GNU Lesser General Public License as published by
+the Free Software Foundation; either version 3 of the License, or (at your
+option) any later version.
+
+The GNU MP Library is distributed in the hope that it will be useful, but
+WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+or FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public
+License for more details.
+
+You should have received a copy of the GNU Lesser General Public License
+along with the GNU MP Library. If not, see http://www.gnu.org/licenses/. */
+
+#define GMP_LIMB_BITS 32
+#define BYTES_PER_MP_LIMB 4
+
+/* 1000MHz Cortex-A9 */
+
+#define MOD_1_NORM_THRESHOLD 0 /* always */
+#define MOD_1_UNNORM_THRESHOLD 0 /* always */
+#define MOD_1N_TO_MOD_1_1_THRESHOLD 2
+#define MOD_1U_TO_MOD_1_1_THRESHOLD 5
+#define MOD_1_1_TO_MOD_1_2_THRESHOLD 13
+#define MOD_1_2_TO_MOD_1_4_THRESHOLD MP_SIZE_T_MAX
+#define PREINV_MOD_1_TO_MOD_1_THRESHOLD 12
+#define USE_PREINV_DIVREM_1 1 /* native */
+#define DIV_QR_2_PI2_THRESHOLD MP_SIZE_T_MAX /* never */
+#define DIVEXACT_1_THRESHOLD MP_SIZE_T_MAX /* never */
+#define BMOD_1_TO_MOD_1_THRESHOLD 21
+
+#define MUL_TOOM22_THRESHOLD 37
+#define MUL_TOOM33_THRESHOLD 66
+#define MUL_TOOM44_THRESHOLD 195
+#define MUL_TOOM6H_THRESHOLD 333
+#define MUL_TOOM8H_THRESHOLD 1105
+
+#define MUL_TOOM32_TO_TOOM43_THRESHOLD 120
+#define MUL_TOOM32_TO_TOOM53_THRESHOLD 115
+#define MUL_TOOM42_TO_TOOM53_THRESHOLD 79
+#define MUL_TOOM42_TO_TOOM63_THRESHOLD 120
+#define MUL_TOOM43_TO_TOOM54_THRESHOLD 131
+
+#define SQR_BASECASE_THRESHOLD 0 /* always (native) */
+#define SQR_TOOM2_THRESHOLD 46
+#define SQR_TOOM3_THRESHOLD 99
+#define SQR_TOOM4_THRESHOLD 158
+#define SQR_TOOM6_THRESHOLD 296
+#define SQR_TOOM8_THRESHOLD 360
+
+#define MULMID_TOOM42_THRESHOLD 60
+
+#define MULMOD_BNM1_THRESHOLD 9
+#define SQRMOD_BNM1_THRESHOLD 13
+
+#define MUL_FFT_MODF_THRESHOLD 432 /* k = 5 */
+#define MUL_FFT_TABLE3 \
+ { { 432, 5}, { 14, 4}, { 29, 5}, { 15, 4}, \
+ { 32, 5}, { 18, 4}, { 37, 5}, { 29, 6}, \
+ { 15, 5}, { 32, 6}, { 29, 7}, { 15, 6}, \
+ { 32, 7}, { 17, 6}, { 36, 7}, { 19, 6}, \
+ { 39, 7}, { 23, 6}, { 47, 7}, { 29, 8}, \
+ { 15, 7}, { 31, 6}, { 63, 7}, { 35, 8}, \
+ { 19, 7}, { 41, 8}, { 23, 7}, { 49, 8}, \
+ { 27, 9}, { 15, 8}, { 31, 7}, { 65, 8}, \
+ { 35, 7}, { 71, 8}, { 39, 7}, { 79, 8}, \
+ { 43, 9}, { 23, 8}, { 55,10}, { 15, 9}, \
+ { 31, 8}, { 71, 9}, { 39, 8}, { 83, 9}, \
+ { 47, 8}, { 99, 9}, { 55,10}, { 31, 9}, \
+ { 79,10}, { 47, 9}, { 103,11}, { 31,10}, \
+ { 63, 9}, { 135,10}, { 79, 9}, { 159,10}, \
+ { 95, 9}, { 191,10}, { 111,11}, { 63,10}, \
+ { 127, 9}, { 255,10}, { 143, 9}, { 287,10}, \
+ { 159,11}, { 95,10}, { 191, 9}, { 383,12}, \
+ { 63,11}, { 127,10}, { 255, 9}, { 511,10}, \
+ { 271, 9}, { 543,10}, { 287,11}, { 159,10}, \
+ { 319, 9}, { 639,10}, { 335, 9}, { 671,10}, \
+ { 351,11}, { 191,10}, { 383, 9}, { 767,10}, \
+ { 415,11}, { 223,12}, { 4096,13}, { 8192,14}, \
+ { 16384,15}, { 32768,16} }
+#define MUL_FFT_TABLE3_SIZE 90
+#define MUL_FFT_THRESHOLD 5312
+
+#define SQR_FFT_MODF_THRESHOLD 400 /* k = 5 */
+#define SQR_FFT_TABLE3 \
+ { { 400, 5}, { 13, 4}, { 27, 5}, { 14, 4}, \
+ { 34, 5}, { 19, 4}, { 39, 5}, { 29, 6}, \
+ { 15, 5}, { 33, 6}, { 29, 7}, { 15, 6}, \
+ { 37, 7}, { 19, 6}, { 39, 7}, { 21, 6}, \
+ { 43, 7}, { 23, 6}, { 47, 7}, { 29, 8}, \
+ { 15, 7}, { 37, 8}, { 19, 7}, { 43, 8}, \
+ { 23, 7}, { 49, 8}, { 27, 7}, { 55, 9}, \
+ { 15, 8}, { 31, 7}, { 63, 8}, { 43, 9}, \
+ { 23, 8}, { 55,10}, { 15, 9}, { 31, 8}, \
+ { 67, 9}, { 39, 8}, { 79, 9}, { 55,10}, \
+ { 31, 9}, { 79,10}, { 47, 9}, { 95,11}, \
+ { 31,10}, { 63, 9}, { 143,10}, { 79, 9}, \
+ { 159, 8}, { 319,10}, { 111,11}, { 63,10}, \
+ { 127, 9}, { 255,10}, { 143, 9}, { 287, 8}, \
+ { 575, 9}, { 303, 8}, { 607,10}, { 159, 9}, \
+ { 319, 8}, { 639,11}, { 95, 9}, { 383,12}, \
+ { 63,11}, { 127,10}, { 255, 9}, { 511, 8}, \
+ { 1023, 9}, { 527,10}, { 271, 9}, { 543,10}, \
+ { 287, 9}, { 575,10}, { 303, 9}, { 607,11}, \
+ { 159,10}, { 319, 9}, { 639,10}, { 335, 9}, \
+ { 671,10}, { 351, 9}, { 703,10}, { 367, 9}, \
+ { 735,10}, { 383, 9}, { 767,10}, { 415, 9}, \
+ { 831,11}, { 223,12}, { 4096,13}, { 8192,14}, \
+ { 16384,15}, { 32768,16} }
+#define SQR_FFT_TABLE3_SIZE 94
+#define SQR_FFT_THRESHOLD 2880
+
+#define MULLO_BASECASE_THRESHOLD 7
+#define MULLO_DC_THRESHOLD 29
+#define MULLO_MUL_N_THRESHOLD 10323
+
+#define DC_DIV_QR_THRESHOLD 25
+#define DC_DIVAPPR_Q_THRESHOLD 54
+#define DC_BDIV_QR_THRESHOLD 40
+#define DC_BDIV_Q_THRESHOLD 96
+
+#define INV_MULMOD_BNM1_THRESHOLD 74
+#define INV_NEWTON_THRESHOLD 25
+#define INV_APPR_THRESHOLD 25
+
+#define BINV_NEWTON_THRESHOLD 198
+#define REDC_1_TO_REDC_2_THRESHOLD 3
+#define REDC_2_TO_REDC_N_THRESHOLD 142
+
+#define MU_DIV_QR_THRESHOLD 40
+#define MU_DIVAPPR_Q_THRESHOLD 2089
+#define MUPI_DIV_QR_THRESHOLD 13
+#define MU_BDIV_QR_THRESHOLD 1652
+#define MU_BDIV_Q_THRESHOLD 2130
+
+#define POWM_SEC_TABLE 37,98,246,1298
+
+#define MATRIX22_STRASSEN_THRESHOLD 18
+#define HGCD_THRESHOLD 42
+#define HGCD_APPR_THRESHOLD 56
+#define HGCD_REDUCE_THRESHOLD 3134
+#define GCD_DC_THRESHOLD 315
+#define GCDEXT_DC_THRESHOLD 263
+#define JACOBI_BASE_METHOD 4
+
+#define GET_STR_DC_THRESHOLD 18
+#define GET_STR_PRECOMPUTE_THRESHOLD 27
+#define SET_STR_DC_THRESHOLD 136
+#define SET_STR_PRECOMPUTE_THRESHOLD 960
+
+#define FAC_DSC_THRESHOLD 327
+#define FAC_ODD_THRESHOLD 30
diff -r 293ed286d8cc -r 1f3faeb9f052 mpn/sparc64/ultrasparct3/aormul_2.asm
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/mpn/sparc64/ultrasparct3/aormul_2.asm Fri Mar 08 00:05:18 2013 +0100
@@ -0,0 +1,197 @@
+dnl SPARC v9 mpn_mul_2 and mpn_addmul_2 for T3/T4.
+
+dnl Copyright 2013 Free Software Foundation, Inc.
+
+dnl This file is part of the GNU MP Library.
+
+dnl The GNU MP Library is free software; you can redistribute it and/or modify
+dnl it under the terms of the GNU Lesser General Public License as published
+dnl by the Free Software Foundation; either version 3 of the License, or (at
+dnl your option) any later version.
+
+dnl The GNU MP Library is distributed in the hope that it will be useful, but
+dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public
+dnl License for more details.
+
+dnl You should have received a copy of the GNU Lesser General Public License
+dnl along with the GNU MP Library. If not, see http://www.gnu.org/licenses/.
+
+include(`../config.m4')
+
+
+C cycles/limb
+C UltraSPARC T3: ?
+C UltraSPARC T4: ?
+
+
+C This code is based on the summation algorithm used for x86-64 where the
+C multiply instruction clobbers the carry flag. It would be possible to
+C keep carry alive and thereby save 3 instructions per iteration.
+C
+C The code is reasonably scheduled for long-latency instructions, but no micro-
+C scheduling has been done. There is hope that this could run at around 3.5
+C c/l on T4 if an optimal schedule was found.
+
+
+C INPUT PARAMETERS
+define(`rp', `%i0')
+define(`up', `%i1')
+define(`n', `%i2')
+define(`vp', `%i3')
+
+define(`v0', `%o0')
+define(`v1', `%o1')
+define(`w0', `%o2')
+define(`w1', `%o3')
+define(`w2', `%o4')
+define(`w3', `%o5')
+
+C Free registers: i5 o7. We use g2,g3 for the missing.m4 emulation mechanism.
+
+ifdef(`OPERATION_mul_2',`
+ define(`ADDSUB', `add')
+ define(`AM2', `')
+ define(`ADDX', `addcc`'$1')
+ define(`func', `mpn_mul_2')
+')
+ifdef(`OPERATION_addmul_2',`
+ define(`ADDSUB', `sub')
+ define(`AM2', `$1')
+ define(`ADDX', `addxccc($1,$2,$3)')
+ define(`func', `mpn_addmul_2')
+')
+
+
+C Testing mechanism for running this on older v9 processrs
+ifdef(`FAKE_T3',`
+ include(`missing.m4')
+',`
+ define(`addxccc', ``addxcc' $1, $2, $3')
+ define(`addxc', ``addxc' $1, $2, $3')
+ define(`umulxhi', ``umulxhi' $1, $2, $3')
+')
+
+
+MULFUNC_PROLOGUE(mpn_mul_2 mpn_addmul_2)
+
+ASM_START()
+ifdef(`FAKE_T3',`
+ REGISTER(%g2,#scratch)
+ REGISTER(%g3,#scratch)
+')
+PROLOGUE(func)
+ save %sp, -176, %sp
+
+ ldx [vp+0], v0 C load v0
More information about the gmp-commit
mailing list