[Gmp-commit] /var/hg/gmp: 5 new changesets

mercurial at gmplib.org mercurial at gmplib.org
Sun Mar 3 19:24:29 CET 2013


details:   /var/hg/gmp/rev/1e70d28969db
changeset: 15517:1e70d28969db
user:      Torbjorn Granlund <tege at gmplib.org>
date:      Sun Mar 03 19:21:31 2013 +0100
description:
Add arm64 logops support.

details:   /var/hg/gmp/rev/896f2b0c5892
changeset: 15518:896f2b0c5892
user:      Torbjorn Granlund <tege at gmplib.org>
date:      Sun Mar 03 19:21:49 2013 +0100
description:
Add arm64 gcd_1 support.

details:   /var/hg/gmp/rev/707ec7821f86
changeset: 15519:707ec7821f86
user:      Torbjorn Granlund <tege at gmplib.org>
date:      Sun Mar 03 19:22:46 2013 +0100
description:
Replace arm64 addmul_1.asm with dual-operation aorsmul_1.asm.

details:   /var/hg/gmp/rev/1fd3ac263435
changeset: 15520:1fd3ac263435
user:      Torbjorn Granlund <tege at gmplib.org>
date:      Sun Mar 03 19:23:25 2013 +0100
description:
Completely rewrite arm64 aors_n.asm.

details:   /var/hg/gmp/rev/c803ab4677f0
changeset: 15521:c803ab4677f0
user:      Torbjorn Granlund <tege at gmplib.org>
date:      Sun Mar 03 19:24:26 2013 +0100
description:
ChangeLog

diffstat:

 ChangeLog               |    8 ++-
 mpn/arm64/addmul_1.asm  |   97 ----------------------------------------
 mpn/arm64/aors_n.asm    |   46 ++++++++++++------
 mpn/arm64/aorsmul_1.asm |  111 ++++++++++++++++++++++++++++++++++++++++++++++
 mpn/arm64/gcd_1.asm     |  115 ++++++++++++++++++++++++++++++++++++++++++++++++
 mpn/arm64/logops_n.asm  |   95 +++++++++++++++++++++++++++++++++++++++
 6 files changed, 357 insertions(+), 115 deletions(-)

diffs (truncated from 518 to 300 lines):

diff -r dc0589921b80 -r c803ab4677f0 ChangeLog
--- a/ChangeLog	Sun Mar 03 16:31:25 2013 +0100
+++ b/ChangeLog	Sun Mar 03 19:24:26 2013 +0100
@@ -1,10 +1,14 @@
 2013-03-03  Torbjorn Granlund  <tege at gmplib.org>
 
+	* mpn/arm64/logops_n.asm: New file.
+	* mpn/arm64/gcd_1.asm: New file.
+	* mpn/arm64/aorsmul_1.asm: New file.
+	* mpn/arm64/addmul_1.asm: Remove.
+	* mpn/arm64/aors_n.asm: Complete rewrite.
+
 	* mpn/arm/neon/tabselect.asm: New file.
-
 	* mpn/arm/copyi.asm: Software pipeline.
 	* mpn/arm/copyd.asm: Likewise.
-
 	* mpn/arm/tabselect.asm: New file.
 
 	* config.guess: Rework tmp file handling to resemble configfsf.guess's.
diff -r dc0589921b80 -r c803ab4677f0 mpn/arm64/addmul_1.asm
--- a/mpn/arm64/addmul_1.asm	Sun Mar 03 16:31:25 2013 +0100
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,97 +0,0 @@
-dnl  ARM64 mpn_addmul_1
-
-dnl  Contributed to the GNU project by Torbjörn Granlund.
-
-dnl  Copyright 2013 Free Software Foundation, Inc.
-
-dnl  This file is part of the GNU MP Library.
-
-dnl  The GNU MP Library is free software; you can redistribute it and/or modify
-dnl  it under the terms of the GNU Lesser General Public License as published
-dnl  by the Free Software Foundation; either version 3 of the License, or (at
-dnl  your option) any later version.
-
-dnl  The GNU MP Library is distributed in the hope that it will be useful, but
-dnl  WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
-dnl  or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU Lesser General Public
-dnl  License for more details.
-
-dnl  You should have received a copy of the GNU Lesser General Public License
-dnl  along with the GNU MP Library.  If not, see http://www.gnu.org/licenses/.
-
-include(`../config.m4')
-
-C	     cycles/limb
-C Cortex-A53	 ?
-C Cortex-A57	 ?
-
-define(`rp', `x0')
-define(`up', `x1')
-define(`n',  `x2')
-define(`v0', `x3')
-
-ASM_START()
-PROLOGUE(mpn_addmul_1)
-	ldr	x12, [up], #8
-	and	x6, n, #3
-	and	n, n, #-4
-	cbz	x6, L(fi0)
-	cmp	x6, #2
-	bcc	L(fi1)
-	beq	L(fi2)
-
-L(fi3):	mul	x8, x12, v0
-	umulh	x7, x12, v0
-	b	L(L3)
-L(fi2):	mul	x7, x12, v0
-	umulh	x10, x12, v0
-	b	L(L2)
-L(fi0):	mul	x9, x12, v0
-	umulh	x8, x12, v0
-	sub	n, n, #4
-	b	L(L0)
-L(fi1):	mul	x10, x12, v0
-	umulh	x9, x12, v0
-	cbz	n, L(end)
-
-L(top):	sub	n, n, #4
-	ldr	x12, [up], #8
-	ldr	x11, [rp]
-	mul	x6, x12, v0
-	umulh	x5, x12, v0
-	adds	x10, x10, x11
-	str	x10, [rp], #8
-	adcs	x9, x6, x9
-	adc	x8, x5, xzr
-L(L0):	ldr	x12, [up], #8
-	ldr	x11, [rp]
-	mul	x6, x12, v0
-	umulh	x5, x12, v0
-	adds	x9, x9, x11
-	str	x9, [rp] ,#8
-	adcs	x8, x6, x8
-	adc	x7, x5, xzr
-L(L3):	ldr	x12, [up], #8
-	ldr	x11, [rp]
-	mul	x6, x12, v0
-	umulh	x5, x12, v0
-	adds	x8, x8, x11
-	str	x8, [rp], #8
-	adcs	x7, x6, x7
-	adc	x10, x5, xzr
-L(L2):	ldr	x12, [up], #8
-	ldr	x11, [rp]
-	mul	x6, x12, v0
-	umulh	x5, x12, v0
-	adds	x7, x7, x11
-	str	x7, [rp], #8
-	adcs	x10, x6, x10
-	adc	x9, x5, xzr
-	cbnz	n, L(top)
-
-L(end):	ldr	x11, [rp]
-	adds	x10, x10, x11
-	str	x10, [rp]
-	adc	x0, x9, xzr
-	ret
-EPILOGUE()
diff -r dc0589921b80 -r c803ab4677f0 mpn/arm64/aors_n.asm
--- a/mpn/arm64/aors_n.asm	Sun Mar 03 16:31:25 2013 +0100
+++ b/mpn/arm64/aors_n.asm	Sun Mar 03 19:24:26 2013 +0100
@@ -25,10 +25,12 @@
 C Cortex-A53	 ?
 C Cortex-A57	 ?
 
-define(`rp', `r0')
-define(`up', `r1')
-define(`vp', `r2')
-define(`n',  `r3')
+changecom(@&*$)
+
+define(`rp', `x0')
+define(`up', `x1')
+define(`vp', `x2')
+define(`n',  `x3')
 
 ifdef(`OPERATION_add_n', `
   define(`ADDSUB',	adds)
@@ -57,19 +59,31 @@
 EPILOGUE()
 PROLOGUE(func)
 	CLRCY
-L(ent):	lsl	x3, x3, #3
-	add	x0, x0, x3
-	add	x1, x1, x3
-	add	x2, x2, x3
-	neg	x3, x3
+L(ent):	tbz	n, #0, L(b0)
 
-L(top):	ldr	x6, [x1,x3]
-	ldr	x5, [x2,x3]
-	ADDSUBC	x7, x6, x5
-	str	x7, [x0,x3]
-	add	x3, x3, #8
-	cbnz	x3, L(top)
+	ldr	x4, [up],#8
+	ldr	x6, [vp],#8
+	sub	n, n, #1
+	ADDSUBC	x8, x4, x6
+	str	x8, [rp],#8
+	cbz	n, L(rt)
 
-	RETVAL
+L(b0):	ldp	x4, x5, [up],#16
+	ldp	x6, x7, [vp],#16
+	sub	n, n, #2
+	ADDSUBC	x8, x4, x6
+	ADDSUBC	x9, x5, x7
+	cbz	n, L(end)
+
+L(top):	ldp	x4, x5, [up],#16
+	ldp	x6, x7, [vp],#16
+	sub	n, n, #2
+	stp	x8, x9, [rp],#16
+	ADDSUBC	x8, x4, x6
+	ADDSUBC	x9, x5, x7
+	cbnz	n, L(top)
+
+L(end):	stp	x8, x9, [rp],#16
+L(rt):	RETVAL
 	ret
 EPILOGUE()
diff -r dc0589921b80 -r c803ab4677f0 mpn/arm64/aorsmul_1.asm
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/mpn/arm64/aorsmul_1.asm	Sun Mar 03 19:24:26 2013 +0100
@@ -0,0 +1,111 @@
+dnl  ARM64 mpn_submul_1
+
+dnl  Contributed to the GNU project by Torbjörn Granlund.
+
+dnl  Copyright 2013 Free Software Foundation, Inc.
+
+dnl  This file is part of the GNU MP Library.
+
+dnl  The GNU MP Library is free software; you can redistribute it and/or modify
+dnl  it under the terms of the GNU Lesser General Public License as published
+dnl  by the Free Software Foundation; either version 3 of the License, or (at
+dnl  your option) any later version.
+
+dnl  The GNU MP Library is distributed in the hope that it will be useful, but
+dnl  WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+dnl  or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU Lesser General Public
+dnl  License for more details.
+
+dnl  You should have received a copy of the GNU Lesser General Public License
+dnl  along with the GNU MP Library.  If not, see http://www.gnu.org/licenses/.
+
+include(`../config.m4')
+
+C	     cycles/limb
+C Cortex-A53	 ?
+C Cortex-A57	 ?
+
+changecom(@&*$)
+
+define(`rp', `x0')
+define(`up', `x1')
+define(`n',  `x2')
+define(`v0', `x3')
+
+ifdef(`OPERATION_addmul_1', `
+  define(`ADDSUB',	adds)
+  define(`ADDSUBC',	adcs)
+  define(`COND',	`cc')
+  define(`func',	mpn_addmul_1)')
+ifdef(`OPERATION_submul_1', `
+  define(`ADDSUB',	subs)
+  define(`ADDSUBC',	sbcs)
+  define(`COND',	`cs')
+  define(`func',	mpn_submul_1)')
+
+MULFUNC_PROLOGUE(mpn_addmul_1 mpn_submul_1)
+
+PROLOGUE(func)
+	mov	x15, #0
+
+	tbz	n, #0, L(1)
+
+	ldr	x4, [up],#8
+	mul	x8, x4, v0
+	umulh	x12, x4, v0
+	adds	x8, x8, x15
+	ldr	x4, [rp,#0]
+	ADDSUB	x8, x4, x8
+	csinc	x15, x12, x12, COND
+	str	x8, [rp],#8
+
+L(1):	tbz	n, #1, L(2)
+
+	ldp	x4, x5, [up],#16
+	mul	x8, x4, v0
+	umulh	x12, x4, v0
+	mul	x9, x5, v0
+	umulh	x13, x5, v0
+	adds	x8, x8, x15
+	adcs	x9, x9, x12
+	ldp	x4, x5, [rp,#0]
+	adc	x15, x13, xzr
+	sub	n, n, #1
+	ADDSUB	x8, x4, x8
+	ADDSUBC	x9, x5, x9
+	csinc	x15, x15, x15, COND
+	stp	x8, x9, [rp],#16
+
+L(2):	lsr	n, n, 2
+	cbz	n, L(end)
+
+L(top):	ldp	x4, x5, [up],#16
+	ldp	x6, x7, [up],#16
+	mul	x8, x4, v0
+	umulh	x12, x4, v0
+	mul	x9, x5, v0
+	umulh	x13, x5, v0
+	adds	x8, x8, x15
+	mul	x10, x6, v0
+	umulh	x14, x6, v0
+	adcs	x9, x9, x12
+	mul	x11, x7, v0
+	umulh	x15, x7, v0
+	adcs	x10, x10, x13
+	ldp	x4, x5, [rp,#0]
+	adcs	x11, x11, x14
+	ldp	x6, x7, [rp,#16]
+	adc	x15, x15, xzr
+	sub	n, n, #1
+	ADDSUB	x8, x4, x8
+	ADDSUBC	x9, x5, x9
+	ADDSUBC	x10, x6, x10
+	ADDSUBC	x11, x7, x11
+	stp	x8, x9, [rp],#16
+	csinc	x15, x15, x15, COND
+	stp	x10, x11, [rp],#16
+	cbnz	n, L(top)
+
+L(end):	mov	x0, x15
+	ret
+EPILOGUE()


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