ARM Cortex-A7 feature misdetection

[Jeffrey Walton]

On Tue, Feb 6, 2018 at 1:54 PM, Niels Möller <nisse at lysator.liu.se> wrote:
> Jeffrey Walton <noloader at gmail.com> writes:
>
>> I was attempting to test this change. It seems mpn/tmp-lshift.s gets
>> rewritten on each invocation of make so my change gets blown away.
>
> You should edit the .asm source files under mpn/arm/neon. Before m4
> processing.

Thanks Niels.

I see one file that looks interesting (lshiftc.asm):

    $ ls mpn/arm/neon/
    README       lorrshift.asm  sec_tabselect.asm
    hamdist.asm  lshiftc.asm    popcount.asm

Does this look about right:

    # mpn/arm/neon/lshiftc.asm
    ...

    ASM_START()
        TEXT
        ALIGN(64)
        .fpu neon
    PROLOGUE(mpn_lshiftc)
    IFLSH(` mov     r12, n, lsl #2  ')
    IFLSH(` add     rp, rp, r12     ')
    IFLSH(` add     ap, ap, r12     ')

The reason I ask is, the compile error is still present and it appears
the change is not applied:

    $ cat mpn/tmp-lshift.s
    ...
        .text
        .align  6
        .text
        .align  3
        .globl  __gmpn_lshift
        .type   __gmpn_lshift,#function
    __gmpn_lshift:
    ...

I'm not sure if I am doing the wrong thing to the wrong file, or if
something else is happening.

Or maybe better, can you check-in the change so I can rip it from
https://gmplib.org/repo/gmp ?

Jeff