[PATCH] Fix wrong code generation for AMD Fam 11h CPUs in 32-bit mode

[Torbjorn Granlund]

Mikael Pettersson <mikpe at it.uu.se> writes:

  I suspect Fam 11h is somewhat common.  According to the Fam 11h revision
  guide there are Athlons, Semprons, and Turions based on it, in both single
  and dual-core configurarions (Turions only as dual-core).  I see no signs
  of any Opterons being based on it though.
  
This is bad news, perhaps we ought to make a GMP 5.0.5.
I pushed a fix to the 5.0 repo as well as the main repo.
  
   > I am quite surprised by the nature of the 'make check' failures; if the
   > compiler is directed by GMP to use unimplemented instructions, I'd
   > really expect "Illegal instruction" traps, not miscomputations,
   > segfaults, and hangs!
   > 
   > And in 64-bit mode all works fine.  Even more strange.
  
I would be interested in an analysis of what causes this behaviour.  If
you do a build passing CFLAGS="m32 -g -march=amdfam10", do the crashes
still happen?

In that case, perhaps you could debug this, perhaps in parallel on a k10
and a 11h box, and see where and why they deviate?

-- 
Torbjörn