IA64 & HAVE_ABI_64 question

Steve Ellcey sje at cup.hp.com
Wed May 5 21:57:08 CEST 2010

I am looking at a bug involving building GCC in 64 bit mode on HP-UX Itanium.
The compiler is dying in the GMP library and it looks like it is dying in
the GMP __gmpn_copyi routine.  I looked at mpn/ia64/copyi.asm and at the
beginning of this code is some ifdefe'd code under an HAVE_ABI_32 bit
ifdef.  This code is needed when compiling GMP in 32 bit mode on HP-UX but
should not be used when compiling in 64 bit mode on HP-UX.  But when
I use gdb to disassemble __gmpn_copyi I see the ifdef'ed code (the addp4's).
So I think the bug is that I am compiling GMP in 64 bit mode but HAVE_ABI_32
is defined.

My problem is that I cannot find in the GMP sources or in my make output
or in any generated header file where HAVE_ABI_32 (or any other HAVE_ABI
value) is being set.  I see where ABI is set by configure:


but I don't see where this is used to define HAVE_ABI_64.  And, of course,
since I am defining ABI to be 64 why does HAVE_ABI_32 appear to to getting
set during the build?

Can anyone help me?

Steve Ellcey
sje at cup.hp.com

mpn/ia64/copyi.asm code:

        .save ar.lc, r2
                mov     r2 = ar.lc
`               addp4   r32 = 0, r32
                addp4   r33 = 0, r33
                sxt4    r34 = r34
                and     r14 = 3, r34

gdb backtrace:

#0  0x4000000008ad6070:0 in __gmpn_copyi+0xf0 ()
#1  0x4000000008aad7e0:0 in __gmpz_import ()
    at /tmp/be16680/gmp-4.2.4/mpz/import.c:67
#2  0x40000000020de8d0:0 in mpz_set_double_int (result=0x9fffffffffffeb38, 
    val={low = 63, high = 0}, uns=0 '\000')
    at /proj/opensrc_nobackup/nightly2/src/trunk/gcc/double-int.c:1161
#3  0x400000000574ed30:0 in split_to_var_and_offset (expr=0x9fffffffbd3cbf78, 
    var=0x9fffffffffffeb28, offset=0x9fffffffffffeb38)

gdb disassembly of __gmpn_copyi:

Dump of assembler code for function __gmpn_copyi:
0x4000000008ad5f80:0 <__gmpn_copyi>:                  nop.m          0x0
0x4000000008ad5f80:1 <__gmpn_copyi+0x1>:              mov.i          r2=ar.lc
0x4000000008ad5f80:2 <__gmpn_copyi+0x2>:              addp4          r32=0,r32
0x4000000008ad5f90:0 <__gmpn_copyi+0x10>:             addp4          r33=0,r33
0x4000000008ad5f90:1 <__gmpn_copyi+0x11>:             sxt4           r34=r34;;
0x4000000008ad5f90:2 <__gmpn_copyi+0x12>:             and            r14=0x3,r34

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