xeon 64 bits

[Torbjorn Granlund]

Emmanuel Thomé <Emmanuel.Thome+gmp at loria.fr> writes:

  NOTE : gmp itself doesn't seem to compile with -O3 (this is still on the
  same opteron box) :
  
Ouch.  Some moron changed the meaning of "q" (apparently in GCC
3.1).

Here is a patch for GMP 4.1.4 that makes it handle both the old
and new meaning of "q".

Index: gmp-impl.h
===================================================================
RCS file: /home/cvsfiles/gmp/gmp-impl.h,v
retrieving revision 1.281.2.12
diff -c -1 -r1.281.2.12 gmp-impl.h
*** gmp-impl.h	22 Apr 2004 23:59:53 -0000	1.281.2.12
--- gmp-impl.h	29 Sep 2004 19:22:23 -0000
***************
*** 2190,2191 ****
--- 2190,2201 ----
  #if defined (__GNUC__) && ! defined (NO_ASM) && HAVE_HOST_CPU_FAMILY_x86
+ /* Some clever GCC maintainer decided to change the meaning of the q register
+    flag with GCC version 3.1.  He added a Q flag with the old meaning at the
+    same time.  This forces us to use a conditional on GCC version.  */
+ #if __GMP_GNUC_PREREQ (3,1)
+ #define __GMP_qm "=Qm"
+ #define __GMP_q "=Q"
+ #else
+ #define __GMP_qm "=qm"
+ #define __GMP_q "=q"
+ #endif
  #define ULONG_PARITY(p, n)              \
***************
*** 2195,2199 ****
      __n ^= (__n >> 16);                 \
!     asm ("xorb   %h1, %b1\n"            \
!          "setpo  %0\n"                  \
!          : "=qm" (__p), "=q" (__n)      \
           : "1" (__n));                  \
--- 2205,2209 ----
      __n ^= (__n >> 16);                 \
!     asm ("xorb   %h1, %b1\n\t"          \
!          "setpo  %0"                    \
!          : __GMP_qm (__p), __GMP_q (__n)\
           : "1" (__n));                  \


  ( %h1 seems like unwanted on x86-64 ; why this very thing _passes_ with
  -O2 is bizarre to me. )
  
Because the register allocator by chance happened to choose a
register for which a high part exists.

-- 
Torbjörn