Risc V greatly underperforms

[Hans Petter Selasky]

Hi,

On 9/21/21 12:03 PM, Torbjörn Granlund wrote:
> A carry bit helps for some codes, GMP being a prime example.
> 

If the GMP could utilitize multiple cores when doing bignum 
multiplication and addition, I think the picture would look different.

For example for addition, you could split the number in two parts, and 
then speculate if there is an addition for the higher part or not.

I thought that RISC-V would produce cheaper and more cores, and that 
single core performance was not that critical.

Talking about x86, don't forget that there is microcode below each 
instruction.

--HPS