[PATCH 11/12] x86/k6: Prepend X86_NOTRACK to "jmp *%reg"

[H.J. Lu]

Since some K6 .asm files uses a trick to implment jump tables with LEA,
prepend X86_NOTRACK to "jmp *%reg" to disable indirect branch tracking
when Intel CET is enabled.

	* mpn/x86/k6/aorsmul_1.asm: Prepend X86_NOTRACK to "jmp *%reg".
	* mpn/x86/k6/mul_basecase.asm: Likewise.
	* mpn/x86/k6/sqr_basecase.asm: Likewise.
---
 mpn/x86/k6/aorsmul_1.asm    | 2 +-
 mpn/x86/k6/mul_basecase.asm | 2 +-
 mpn/x86/k6/sqr_basecase.asm | 2 +-
 3 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/mpn/x86/k6/aorsmul_1.asm b/mpn/x86/k6/aorsmul_1.asm
index 78be9d250..018644d15 100644
--- a/mpn/x86/k6/aorsmul_1.asm
+++ b/mpn/x86/k6/aorsmul_1.asm
@@ -321,7 +321,7 @@ L(here):
 	movl	%eax, %esi
 L(noswap):
 
-	jmp	*%edx
+	X86_NOTRACK jmp	*%edx
 
 
 ifdef(`PIC',`
diff --git a/mpn/x86/k6/mul_basecase.asm b/mpn/x86/k6/mul_basecase.asm
index ab202a2ce..0022894aa 100644
--- a/mpn/x86/k6/mul_basecase.asm
+++ b/mpn/x86/k6/mul_basecase.asm
@@ -542,7 +542,7 @@ L(unroll_outer_entry):
 	movl	%edx, %ecx
 L(unroll_noswap):
 
-	jmp	*%eax
+	X86_NOTRACK jmp	*%eax
 
 
 
diff --git a/mpn/x86/k6/sqr_basecase.asm b/mpn/x86/k6/sqr_basecase.asm
index f3a101a0f..f4b8df414 100644
--- a/mpn/x86/k6/sqr_basecase.asm
+++ b/mpn/x86/k6/sqr_basecase.asm
@@ -467,7 +467,7 @@ ifelse(eval(UNROLL_COUNT%2),0,
 	movl	%eax, %ecx
 L(unroll_noswap):
 
-	jmp	*%edx
+	X86_NOTRACK jmp	*%edx
 
 
 	C Must be on an even address here so the low bit of the jump address
-- 
2.24.1