[PATCH 2 of 3] Add MIPS32R2 RDHWR-based cycle counter support

[info at mobile-stream.com]

Add MIPS32R2 RDHWR-based cycle counter support.

diff -r 0ba6f9f13912 -r 6ab06c72027e configure.ac
--- a/configure.ac
+++ b/configure.ac
@@ -1035,7 +1035,11 @@
 	    path_64="mips64/hilo mips64"
 	    ;;
 	esac
-
+        ;;
+
+      mipsisa32r2*-*-*)
+        SPEED_CYCLECOUNTER_OBJ=mips32r2.lo
+        cyclecounter_size=1
         ;;
     esac
     ;;
diff -r 0ba6f9f13912 -r 6ab06c72027e tune/Makefile.am
--- a/tune/Makefile.am
+++ b/tune/Makefile.am
@@ -33,7 +33,7 @@
 AM_LDFLAGS = -no-install
 
 EXTRA_DIST = alpha.asm pentium.asm sparcv9.asm hppa.asm hppa2.asm hppa2w.asm \
-  ia64.asm powerpc.asm powerpc64.asm x86_64.asm many.pl
+  ia64.asm powerpc.asm powerpc64.asm x86_64.asm mips32r2.asm many.pl
 noinst_HEADERS = speed.h
 
 # Prefer -static on the speed and tune programs, since that can avoid
diff -r 0ba6f9f13912 -r 6ab06c72027e tune/mips32r2.asm
--- /dev/null
+++ b/tune/mips32r2.asm
@@ -0,0 +1,12 @@
+include(`../config.m4')
+
+ASM_START()
+PROLOGUE(speed_cyclecounter)
+	rdhwr	$2,$2
+	slti	$3,$2,0
+	sll	$2,$2,1		C save multiply and assume CCRes is 2
+	sw	$3,4($4)
+	jr	$ra
+	 sw	$2,0($4)
+EPILOGUE(speed_cyclecounter)
+ASM_END()