[PATCH 3/3] Rewrite the MIPS legecy code as MIPS r6 style

Torbjörn Granlund tg at gmplib.org
Fri May 24 09:53:42 UTC 2019

  > I read unidiffs really poorly, in particular for asm code.  But to me,
  > it seems like you undo the software pipelining of the current MIPS code,
  > replacing it with plain ("naive") asm code.  I am not sure that is a
  > good idea.

  yes. you are correct.

Please spell out and motivate your changes.

Removing software pipelining just because it has "similar performance"
on one core is not a change which we will apply.

GMP's assembly code is carefully optimised, any changes to it should be
carefully considered, and performance regressions are in general not OK.

MIPS is a special case as GMP developers haven't had good access to MIPS
system for a very long time.  Also, we have seen very little use of GMP
on MIPS.

  On Loongson 3A 3000.
  http://loongson.cn/product/cpu/3/3A3000.html [in Chinese]

I am aware of the Loongson MIPSes.  We had access to some such systems,
but IIRC the hardware broke down after a short time.

Well-optimised new MIPS code (prior to r6) for current cores would be a
useful contribution to GMP.  The main objective is speed, but
unreasonable complexity should be avoided.  Please consult GMP asm code
for e.g. POWER or x86_64 to understand how the project works wrt
different microarchitectures.

For r6 the situation is different.  Plain, non-unrolled and
non-pipelined code is better than no code.  But note that MIPS is such a
plain architecture that the compiler typically can complete with
handwritten asm code!  One just needs to define umul_ppmm (see
longlong.h) and try it!

Please encrypt, key id 0xC8601622

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