Adding support for R6 of MIPS architecture

Torbjörn Granlund tg at
Mon Feb 2 10:22:42 UTC 2015

"Steve Ellcey " <sellcey at> writes:

  #if __mips_isa_rev < 6
   	multu	$8,$7
  	mulu	$11,$8,$7
  	muhu	$12,$8,$7
  are not working.  I guess I things more like:
  	mulu	$11,$8,$7
  	muhu	$12,$8,$7
  	multu	$8,$7
  But I am not sure how or where I would set ISA_REV6.  Should this be handled
  in the configure script or in a *.m4 file under mpn/mips32 or mpn/mips64?  Is
  there an example of a compiler macro being checked and used to set a asm
  ifdef somewhere that I could copy from?
Usually, we provide specific asm files for each cpu (e.g., R10000) or at
least every sub-architecture (e.g., MIPS64r3 vs MIPS64r6).  Since none
of the GMP developers stumbled over a MIPS system in the last 15 years,
the MIPS situation is a bit different; here we have just 32-bit and
64-bit code.

I believe these new multiply instructions are different enough to make
them hard to stick into existing code, using just a simple conditional.
Surely, they don't write anything to the HI and LO registers?

Does MIPS64r6 contain all older architecture revisions as a subset,
i.e., are they 100% backwards compatible (for user level code0?  In that
case, the right approach would be to create a subdirectory mpn/mips64/r6
and put any r6 specific code there.  Thenn make config.guess recognise
mipsr6 CPUs and add the proper paths to

You are welcome to work on that.  Presumably none of the GMP team
members have any system on which to test R6 code, we will not be able to
assist much with such a project.  We'll cheer you on, though.  :-)

Assuming 1005 backwards compatibility, it is important that any new code
improves performance for new devices; else the old code wil be

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