Best way to carry on 2-input architecture?

[Wesley W. Terpstra]

Back to the original question: best way to implement carry.

Torbjorn has a 3-operand adder:
d = a + b + (c&1)

I agree that works to implement carry, but I can't help but notice
that it costs me virtually nothing to implement that as a straight-up
ternary add (if I have 3-operand support already):
d = a + b + c
... a single 3:2 Wallace step followed by a normal adder. In some
FPGAs, ternary addition even has hard IP.

Assuming carry out always writes a 0 or a 1, I think you lose nothing
with add3 as compared to addc. Am I wrong?

Would being able to add three inputs simultaneously speed up other parts of gmp?