[PATCH] T3/T4 sparc shifts, plus more timings

[Torbjorn Granlund]

David Miller <davem at davemloft.net> writes:

  So here is a working generic 64-bit sparc lshift.asm that seems
  to work well on all chips.
  
  I'm now going to iterate over lshiftc and rshift.
  
I whacked off some code at the end, and generalised the resulting code
to become a lorrshift.asm.  Some additional things should be
streamlined, see comments in the code.

-------------- next part --------------
A non-text attachment was scrubbed...
Name: lorrshift.asm
Type: application/octet-stream
Size: 3796 bytes
Desc: not available
URL: <http://gmplib.org/list-archives/gmp-devel/attachments/20130330/12fc2ca1/attachment.obj>
-------------- next part --------------

We lose 0.5 c/l on T1 (and presumably on T2 too) compared to the old
code.  But 17 c/l to 17.5 c/l is no calamity, and it is good to have
fewer variants.

-- 
Torbj?rn