[PATCH] Improve and consolidate sparc PIC assembler.
tg at gmplib.org
Mon Apr 15 15:02:51 CEST 2013
David Miller <davem at davemloft.net> writes:
Sure, let's revert v9/sqr_diagonal.asm and sparc64/gcd_1.asm back to
their previous state for now, and try to work from that. Here's a
Removing those two made us achieve the primary goal, i.e., to make GMP
behave correctly on Solaris again.
I took another look, this time at sparc32/v8/addmul_1.asm the code it
It used to be
` mov %o7,%g4 C Save return address register
0: call 1f
1: mov %g4,%o7 C Restore return address register
while now it is
sethi %hi(_GLOBAL_OFFSET_TABLE_-4), %g4
mov %o7, %g3
or %g4, %lo(_GLOBAL_OFFSET_TABLE_+4), %g4
mov %g3, %o7
sethi %hi(.L1), %g3
or %g3, %lo(.L1), %g3
ld [%g4 + %g3], %g3
plus the two insn of the thunk code
add %o7, %g4, %g4
Can you please explain why we should make such a change?
The old code has worked for a long time on many platforms. A call
without a return is non-standard these days, but the hardware where this
runs were said to either have no return prediction stack, or to
recognize call .+8 as a special case. We could surely add thunk if we
think we ought to pair calls and returns, without all the other stuff.
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