Some arm cortex-a8 improvements

[Torbjorn Granlund]

Richard Henderson <rth at twiddle.net> writes:

  arm.com has them, free registration required.
  
Found it.  Had to click through some zany revision numbers, making me
thing these were revision guides, not proper documentation.

  Table B.5. Multiplication instruction cycle timings
  Instruction
  Cycles
  Result latency
  
  UMAAL
  3	
  4 for the first written register
  5 for the second written register
  
This seem unrelated to reality on my system.  But the documentaton is so
sloppy that many interpretations are possible.

Do you have any guess of what the first number, "cycles" might mean?
Perhaps that's to be taken as 1/throughout?

On my system, umaal has a latency if 3, whatever dependencies I create.
(There are 4 input regs and 2 output, so there are quite a few
possible dependency combinations; I only tried a subset.)

Either the docs are plain wrong, or there are several variants of A9.

-- 
Torbjörn