New insns for GMP

[Torbjorn Granlund]

Next year, Intel will add an instruction MULX that will be extremely
useful for GMP's most critical functions.

It is a 64x64->128 bit multiply with two separate explcit destination
operands and one explcit source operand and one implicit source operand
(in rdx).

The instruction does not clobber the carry flag.

MULX  r1, r2, rm3

r1 = HI(rdx * rm3)
r2 = LO(rdx * rm3)

This insn should make it easy to beat 2 c/l for primitives such as
addmul_1.

Meanwhile, newer ARM processors have instructions that does a*b+c and
a*b+c+d returning the 64-bit result.  I don't know how well pipelined it
is, but the potential for great GMP performance is there.  The forth-
coming ARM64 processors have 64x64->128 bit versions of these insns.

-- 
Torbjörn