[Gmp-commit] /var/hg/gmp: 4 new changesets
mercurial at gmplib.org
mercurial at gmplib.org
Sun Nov 14 14:36:52 UTC 2021
details: /var/hg/gmp/rev/f8c1be924757
changeset: 18286:f8c1be924757
user: Torbjorn Granlund <tg at gmplib.org>
date: Sun Nov 14 11:53:02 2021 +0100
description:
Optimise out annulled shift insn in loop.
details: /var/hg/gmp/rev/2ac79738bd5b
changeset: 18287:2ac79738bd5b
user: Torbjorn Granlund <tg at gmplib.org>
date: Sun Nov 14 12:22:50 2021 +0100
description:
Clean up Sparc 64-bit PIC while allowing old-style gdop-incapable environments.
details: /var/hg/gmp/rev/997cfb50eb32
changeset: 18288:997cfb50eb32
user: Torbjorn Granlund <tg at gmplib.org>
date: Sun Nov 14 12:45:32 2021 +0100
description:
(S390_PATTERN): Rewrite to handle path inheritance.
details: /var/hg/gmp/rev/faf79cca037b
changeset: 18289:faf79cca037b
user: Torbjorn Granlund <tg at gmplib.org>
date: Sun Nov 14 15:33:53 2021 +0100
description:
Accept 4th CMPCY operand, allowing for 2 c/l mpn_sub_n (mpn_add_n cannot beat 3 c/l with RISC V's ISA).
diffstat:
acinclude.m4 | 18 +++++++++---------
configure.ac | 32 +++++++++++++-------------------
mpn/riscv/64/aors_n.asm | 10 +++++-----
mpn/sparc32/sparc-defs.m4 | 8 ++++++--
mpn/sparc64/gcd_11.asm | 17 ++++++++---------
5 files changed, 41 insertions(+), 44 deletions(-)
diffs (245 lines):
diff -r 2d0aa5059850 -r faf79cca037b acinclude.m4
--- a/acinclude.m4 Sun Nov 14 11:52:22 2021 +0100
+++ b/acinclude.m4 Sun Nov 14 15:33:53 2021 +0100
@@ -3085,26 +3085,26 @@
])
-dnl GMP_ASM_SPARC_GOTDATA
+dnl GMP_ASM_SPARC_GDOP
dnl ----------------------
-dnl Determine whether the assembler accepts gotdata relocations.
+dnl Determine whether the assembler accepts gdop relocations.
dnl
dnl See also mpn/sparc32/sparc-defs.m4 which uses the result of this test.
-AC_DEFUN([GMP_ASM_SPARC_GOTDATA],
+AC_DEFUN([GMP_ASM_SPARC_GDOP],
[AC_REQUIRE([GMP_ASM_TEXT])
-AC_CACHE_CHECK([if the assembler accepts gotdata relocations],
- gmp_cv_asm_sparc_gotdata,
+AC_CACHE_CHECK([if the assembler accepts gdop relocations],
+ gmp_cv_asm_sparc_gdop,
[GMP_TRY_ASSEMBLE(
[ $gmp_cv_asm_text
.text
sethi %gdop_hix22(symbol), %g1
or %g1, %gdop_lox10(symbol), %g1
],
-[gmp_cv_asm_sparc_gotdata=yes],
-[gmp_cv_asm_sparc_gotdata=no])])
-
-GMP_DEFINE_RAW(["define(<HAVE_GOTDATA>,<$gmp_cv_asm_sparc_gotdata>)"])
+[gmp_cv_asm_sparc_gdop=yes],
+[gmp_cv_asm_sparc_gdop=no])])
+
+GMP_DEFINE_RAW(["define(<HAVE_GDOP>,<$gmp_cv_asm_sparc_gdop>)"])
])
diff -r 2d0aa5059850 -r faf79cca037b configure.ac
--- a/configure.ac Sun Nov 14 11:52:22 2021 +0100
+++ b/configure.ac Sun Nov 14 15:33:53 2021 +0100
@@ -1365,56 +1365,58 @@
gcc_cflags="$gcc_cflags $fomit_frame_pointer"
gcc_cflags_optlist="arch"
path="s390_32"
+ path_64="s390_64"
if test "$enable_assembly" = "yes" ; then
extra_functions="udiv_w_sdiv"
fi
gcc_32_cflags_maybe="-m31"
- unset cpu gccarch xpath
+ unset cpu
case $host_cpu in
s390)
;;
z900 | z900esa)
cpu="z900"
- gccarch="$cpu"
+ gcc_cflags_arch="-march=$cpu"
extra_functions=""
;;
z990 | z990esa)
cpu="z990"
- gccarch="$cpu"
+ gcc_cflags_arch="-march=$cpu"
extra_functions=""
;;
z9 | z9esa)
cpu="z9"
- gccarch="z9-109"
+ gcc_cflags_arch="-march=$cpu"
extra_functions=""
;;
z10 | z10esa)
cpu="z10"
- gccarch="z10"
+ gcc_cflags_arch="-march=$cpu"
extra_functions=""
;;
z196 | z196esa)
cpu="z196"
- gccarch="z196"
+ gcc_cflags_arch="-march=$cpu"
extra_functions=""
;;
z13 | z13esa)
cpu="z13"
- gccarch="z13"
+ gcc_cflags_arch="-march=$cpu"
extra_functions=""
+ path_64="s390_64/z13 $path_64"
;;
z14 | z14esa)
cpu="z14"
- gccarch="z14"
+ gcc_cflags_arch="-march=$cpu -march=z13"
extra_functions=""
- xpath="z13"
+ path_64="s390_64/z14 s390_64/z13 $path_64"
;;
z15 | z15esa)
cpu="z15"
- gccarch="z15"
+ gcc_cflags_arch="-march=$cpu -march=z14 -march=z13"
extra_functions=""
- xpath="z14 z13"
+ path_64="s390_64/z15 s390_64/z14 s390_64/z13 $path_64"
;;
esac
@@ -1422,14 +1424,6 @@
AC_DEFINE_UNQUOTED(HAVE_HOST_CPU_s390_$cpu)
AC_DEFINE(HAVE_HOST_CPU_s390_zarch)
path="s390_32/esame s390_32"
- path_64=""
- for i in $cpu $xpath; do
- path_64="$path_64 s390_64/$i"
- done
- fi
- path_64="$path_64 s390_64"
- if test x"$gccarch" != x ; then
- gcc_cflags_arch="-march=$gccarch"
fi
case $host in
diff -r 2d0aa5059850 -r faf79cca037b mpn/riscv/64/aors_n.asm
--- a/mpn/riscv/64/aors_n.asm Sun Nov 14 11:52:22 2021 +0100
+++ b/mpn/riscv/64/aors_n.asm Sun Nov 14 15:33:53 2021 +0100
@@ -43,7 +43,7 @@
')
ifdef(`OPERATION_sub_n',`
define(`ADDSUB', `sub')
- define(`CMPCY', `sltu $1, $3, $2')
+ define(`CMPCY', `sltu $1, $3, $4')
define(`func', `mpn_sub_n')
')
@@ -66,9 +66,9 @@
addi n, n, -2 C bookkeeping
addi up, up, 16 C bookkeeping
ADDSUB t0, a4, a6
- CMPCY( t2, t0, a4)
+ CMPCY( t2, t0, a4, a6)
ADDSUB t4, t0, t6 C cycle 3, 9, ...
- CMPCY( t3, t4, t0) C cycle 4, 10, ...
+ CMPCY( t3, t4, t0, t6) C cycle 4, 10, ...
sd t4, 0(rp)
add t6, t2, t3 C cycle 5, 11, ...
L(mid): ld a5, -8(up)
@@ -76,9 +76,9 @@
addi vp, vp, 16 C bookkeeping
addi rp, rp, 16 C bookkeeping
ADDSUB t1, a5, a7
- CMPCY( t2, t1, a5)
+ CMPCY( t2, t1, a5, a7)
ADDSUB t4, t1, t6 C cycle 0, 6, ...
- CMPCY( t3, t4, t1) C cycle 1, 7, ...
+ CMPCY( t3, t4, t1, t6) C cycle 1, 7, ...
sd t4, -8(rp)
add t6, t2, t3 C cycle 2, 8, ...
bne n, x0, L(top) C bookkeeping
diff -r 2d0aa5059850 -r faf79cca037b mpn/sparc32/sparc-defs.m4
--- a/mpn/sparc32/sparc-defs.m4 Sun Nov 14 11:52:22 2021 +0100
+++ b/mpn/sparc32/sparc-defs.m4 Sun Nov 14 15:33:53 2021 +0100
@@ -3,7 +3,7 @@
dnl m4 macros for SPARC assembler (32 and 64 bit).
-dnl Copyright 2002, 2011, 2013, 2017 Free Software Foundation, Inc.
+dnl Copyright 2002, 2011, 2013, 2017, 2021 Free Software Foundation, Inc.
dnl This file is part of the GNU MP Library.
dnl
@@ -74,16 +74,20 @@
define(LEA64,
m4_assert_numargs(3)
-m4_assert_defined(`HAVE_GOTDATA')
`ifdef(`PIC',`
rd %pc, %`$2'
sethi %hi(_GLOBAL_OFFSET_TABLE_+4), %`$3'
add %`$3', %lo(_GLOBAL_OFFSET_TABLE_+8), %`$3'
add %`$2', %`$3', %`$3'
+ifelse(HAVE_GDOP,yes,`
sethi %gdop_hix22(`$1'), %`$2'
xor %`$2', %gdop_lox10(`$1'), %`$2'
ldx [%`$3' + %`$2'], %`$2', %gdop(`$1')
',`
+ sethi %hi(`$1'), %`$2'
+ or %`$2', %lo(`$1'), %`$2'
+ ldx [%`$3' + %`$2'], %`$2'
+')',`
sethi %h44(`$1'), %`$2'
or %`$2', %m44(`$1'), %`$2'
sllx %`$2', 12, %`$2'
diff -r 2d0aa5059850 -r faf79cca037b mpn/sparc64/gcd_11.asm
--- a/mpn/sparc64/gcd_11.asm Sun Nov 14 11:52:22 2021 +0100
+++ b/mpn/sparc64/gcd_11.asm Sun Nov 14 15:33:53 2021 +0100
@@ -3,7 +3,8 @@
dnl Based on the K7 gcd_1.asm, by Kevin Ryde. Rehacked for SPARC by Torbjörn
dnl Granlund.
-dnl Copyright 2000-2002, 2005, 2009, 2011-2013 Free Software Foundation, Inc.
+dnl Copyright 2000-2002, 2005, 2009, 2011-2013, 2021 Free Software Foundation,
+dnl Inc.
dnl This file is part of the GNU MP Library.
dnl
@@ -60,8 +61,6 @@
define(`v0', `%o1')
ASM_START()
- REGISTER(%g2,#scratch)
- REGISTER(%g3,#scratch)
PROLOGUE(mpn_gcd_11)
LEA64(ctz_table, o5, g4)
b L(odd)
@@ -70,19 +69,19 @@
ALIGN(16)
L(top): movcc %xcc, %o4, v0 C v = min(u,v)
movcc %xcc, %o2, %o0 C u = |v - u]
-L(mid): ldub [%o5+%g3], %g5 C
- brz,a,pn %g3, L(shift_alot) C
- srlx %o0, MAXSHIFT, %o0
- srlx %o0, %g5, %o4 C new u, odd
+L(mid): ldub [%o5+%g1], %g5 C
+ brz,pn %g1, L(shift_alot) C
+ srlx %o0, %g5, %o4 C new u, odd
L(odd): subcc v0, %o4, %o2 C v - u, set flags for branch and movcc
sub %o4, v0, %o0 C u - v
bnz,pt %xcc, L(top) C
- and %o2, MASK, %g3 C extract low MAXSHIFT bits from (v-u)
+ and %o2, MASK, %g1 C extract low MAXSHIFT bits from (v-u)
retl
mov v0, %o0
L(shift_alot):
+ mov %o4, %o0
b L(mid)
- and %o0, MASK, %g3 C
+ and %o4, MASK, %g1 C
EPILOGUE()
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