[Gmp-commit] /var/hg/gmp: 2 new changesets

mercurial at gmplib.org mercurial at gmplib.org
Wed May 3 22:01:48 UTC 2017


details:   /var/hg/gmp/rev/f94f11aedca7
changeset: 17378:f94f11aedca7
user:      Torbjorn Granlund <tg at gmplib.org>
date:      Wed May 03 23:52:13 2017 +0200
description:
New files.

details:   /var/hg/gmp/rev/7de363f12f8f
changeset: 17379:7de363f12f8f
user:      Torbjorn Granlund <tg at gmplib.org>
date:      Wed May 03 23:52:41 2017 +0200
description:
ChangeLog

diffstat:

 ChangeLog                          |   22 ++++
 mpn/x86_64/coreisbr/cnd_add_n.asm  |  174 ++++++++++++++++++++++++++++++++
 mpn/x86_64/coreisbr/cnd_aors_n.asm |  200 +++++++++++++++++++++++++++++++++++++
 3 files changed, 396 insertions(+), 0 deletions(-)

diffs (truncated from 411 to 300 lines):

diff -r a1a2fcae1874 -r 7de363f12f8f ChangeLog
--- a/ChangeLog	Wed May 03 19:13:56 2017 +0200
+++ b/ChangeLog	Wed May 03 23:52:41 2017 +0200
@@ -1,3 +1,25 @@
+2017-05-03  Torbjörn Granlund  <tg at gmplib.org>
+
+	* mpn/x86_64/coreisbr/cnd_aors_n.asm: New file.
+	* mpn/x86_64/coreisbr/cnd_add_n.asm: New file.
+
+	* mpn/x86_64/core2/aorsmul_1.asm: Tune.
+
+	* mpn/x86_64/silvermont/mul_1.asm: New file, grabbing another asm file.
+	* mpn/x86_64/silvermont/aorsmul_1.asm: Likewise.
+	* mpn/x86_64/silvermont/aorrlsh1_n.asm: Likewise.
+	* mpn/x86_64/silvermont/aorrlsh2_n.asm: Likewise.
+	* mpn/x86_64/silvermont/lshift.asm: Likewise.
+	* mpn/x86_64/silvermont/rshift.asm: Likewise.
+	* mpn/x86_64/silvermont/lshiftc.asm: Likewise.
+
+	* mpn/x86_64/zen/mul_basecase.asm: Split outer loop into 4 loops.
+
+2017-05-02  Torbjörn Granlund  <tg at gmplib.org>
+
+	* mpn/x86_64/zen/sqr_basecase.asm: Use .byte for encoding all mulx.
+	Misc tuning.
+
 2017-04-27  Torbjörn Granlund  <tg at gmplib.org>
 
 	* mpn/x86_64/zen/sqr_basecase.asm: Rewrite to do 2x and limb squaring
diff -r a1a2fcae1874 -r 7de363f12f8f mpn/x86_64/coreisbr/cnd_add_n.asm
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/mpn/x86_64/coreisbr/cnd_add_n.asm	Wed May 03 23:52:41 2017 +0200
@@ -0,0 +1,174 @@
+dnl  AMD64 mpn_cnd_add_n.
+
+dnl  Copyright 2011-2013, 2017 Free Software Foundation, Inc.
+
+dnl  This file is part of the GNU MP Library.
+dnl
+dnl  The GNU MP Library is free software; you can redistribute it and/or modify
+dnl  it under the terms of either:
+dnl
+dnl    * the GNU Lesser General Public License as published by the Free
+dnl      Software Foundation; either version 3 of the License, or (at your
+dnl      option) any later version.
+dnl
+dnl  or
+dnl
+dnl    * the GNU General Public License as published by the Free Software
+dnl      Foundation; either version 2 of the License, or (at your option) any
+dnl      later version.
+dnl
+dnl  or both in parallel, as here.
+dnl
+dnl  The GNU MP Library is distributed in the hope that it will be useful, but
+dnl  WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+dnl  or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+dnl  for more details.
+dnl
+dnl  You should have received copies of the GNU General Public License and the
+dnl  GNU Lesser General Public License along with the GNU MP Library.  If not,
+dnl  see https://www.gnu.org/licenses/.
+
+include(`../config.m4')
+
+C	     cycles/limb
+C AMD K8,K9
+C AMD K10
+C AMD bd1
+C AMD bd2
+C AMD bd3
+C AMD bd4
+C AMD zen
+C AMD bobcat
+C AMD jaguar
+C Intel P4
+C Intel PNR	 3.0
+C Intel NHM	 3.75
+C Intel SBR	 1.93
+C Intel IBR	 1.60
+C Intel HWL	 1.78
+C Intel BWL	 1.50
+C Intel SKL	 1.50
+C Intel atom
+C Intel SLM	 4.0
+C VIA nano
+
+C NOTES
+C  * It might seem natural to use the cmov insn here, but since this function
+C    is supposed to have the exact same execution pattern for cnd true and
+C    false, and since cmov's documentation is not clear about whether it
+C    actually reads both source operands and writes the register for a false
+C    condition, we cannot use it.
+
+C INPUT PARAMETERS
+define(`cnd_arg', `%rdi')	dnl rcx
+define(`rp',	  `%rsi')	dnl rdx
+define(`up',	  `%rdx')	dnl r8
+define(`vp',	  `%rcx')	dnl r9
+define(`n',	  `%r8')	dnl rsp+40
+
+define(`cnd',     `%rbx')
+
+define(ADDSUB,	add)
+define(ADCSBB,	adc)
+define(func,	mpn_cnd_add_n)
+
+ABI_SUPPORT(DOS64)
+ABI_SUPPORT(STD64)
+
+ASM_START()
+	TEXT
+	ALIGN(16)
+PROLOGUE(mpn_cnd_add_n)
+	FUNC_ENTRY(4)
+IFDOS(`	mov	56(%rsp), R32(%r8)')
+	push	%rbx
+
+	neg	cnd_arg
+	sbb	cnd, cnd		C make cnd mask
+
+	test	$1, R8(n)
+	jz	L(x0)
+L(x1):	test	$2, R8(n)
+	jz	L(b1)
+
+L(b3):	mov	(vp), %rdi
+	mov	8(vp), %r9
+	mov	16(vp), %r10
+	and	cnd, %rdi
+	and	cnd, %r9
+	and	cnd, %r10
+	ADDSUB	(up), %rdi
+	mov	%rdi, (rp)
+	ADCSBB	8(up), %r9
+	mov	%r9, 8(rp)
+	ADCSBB	16(up), %r10
+	mov	%r10, 16(rp)
+	sbb	R32(%rax), R32(%rax)	C save carry
+	lea	24(up), up
+	lea	24(vp), vp
+	lea	24(rp), rp
+	sub	$3, n
+	jnz	L(top)
+	jmp	L(end)
+
+L(x0):	xor	R32(%rax), R32(%rax)
+	test	$2, R8(n)
+	jz	L(top)
+
+L(b2):	mov	(vp), %rdi
+	mov	8(vp), %r9
+	and	cnd, %rdi
+	and	cnd, %r9
+	ADDSUB	(up), %rdi
+	mov	%rdi, (rp)
+	ADCSBB	8(up), %r9
+	mov	%r9, 8(rp)
+	sbb	R32(%rax), R32(%rax)	C save carry
+	lea	16(up), up
+	lea	16(vp), vp
+	lea	16(rp), rp
+	sub	$2, n
+	jnz	L(top)
+	jmp	L(end)
+
+L(b1):	mov	(vp), %rdi
+	and	cnd, %rdi
+	ADDSUB	(up), %rdi
+	mov	%rdi, (rp)
+	sbb	R32(%rax), R32(%rax)	C save carry
+	lea	8(up), up
+	lea	8(vp), vp
+	lea	8(rp), rp
+	dec	n
+	jz	L(end)
+
+	ALIGN(16)
+L(top):	mov	(vp), %rdi
+	mov	8(vp), %r9
+	mov	16(vp), %r10
+	mov	24(vp), %r11
+	lea	32(vp), vp
+	and	cnd, %rdi
+	and	cnd, %r9
+	and	cnd, %r10
+	and	cnd, %r11
+	add	R32(%rax), R32(%rax)	C restore carry
+	ADCSBB	(up), %rdi
+	mov	%rdi, (rp)
+	ADCSBB	8(up), %r9
+	mov	%r9, 8(rp)
+	ADCSBB	16(up), %r10
+	mov	%r10, 16(rp)
+	ADCSBB	24(up), %r11
+	lea	32(up), up
+	mov	%r11, 24(rp)
+	lea	32(rp), rp
+	sbb	R32(%rax), R32(%rax)	C save carry
+	sub	$4, n
+	jnz	L(top)
+
+L(end):	neg	R32(%rax)
+	pop	%rbx
+	FUNC_EXIT()
+	ret
+EPILOGUE()
diff -r a1a2fcae1874 -r 7de363f12f8f mpn/x86_64/coreisbr/cnd_aors_n.asm
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/mpn/x86_64/coreisbr/cnd_aors_n.asm	Wed May 03 23:52:41 2017 +0200
@@ -0,0 +1,200 @@
+dnl  AMD64 mpn_cnd_add_n, mpn_cnd_sub_n
+
+dnl  Copyright 2011-2013, 2017 Free Software Foundation, Inc.
+
+dnl  This file is part of the GNU MP Library.
+dnl
+dnl  The GNU MP Library is free software; you can redistribute it and/or modify
+dnl  it under the terms of either:
+dnl
+dnl    * the GNU Lesser General Public License as published by the Free
+dnl      Software Foundation; either version 3 of the License, or (at your
+dnl      option) any later version.
+dnl
+dnl  or
+dnl
+dnl    * the GNU General Public License as published by the Free Software
+dnl      Foundation; either version 2 of the License, or (at your option) any
+dnl      later version.
+dnl
+dnl  or both in parallel, as here.
+dnl
+dnl  The GNU MP Library is distributed in the hope that it will be useful, but
+dnl  WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+dnl  or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+dnl  for more details.
+dnl
+dnl  You should have received copies of the GNU General Public License and the
+dnl  GNU Lesser General Public License along with the GNU MP Library.  If not,
+dnl  see https://www.gnu.org/licenses/.
+
+include(`../config.m4')
+
+C	     cycles/limb
+C AMD K8,K9
+C AMD K10
+C AMD bd1
+C AMD bd2
+C AMD bd3
+C AMD bd4
+C AMD zen
+C AMD bobcat
+C AMD jaguar
+C Intel P4
+C Intel PNR	 3.0
+C Intel NHM	 2.75
+C Intel SBR	 2.15
+C Intel IBR	 1.65
+C Intel HWL	 2.0
+C Intel BWL	 1.65
+C Intel SKL	 1.65
+C Intel atom
+C Intel SLM	 4.5
+C VIA nano
+
+C NOTES
+C  * It might seem natural to use the cmov insn here, but since this function
+C    is supposed to have the exact same execution pattern for cnd true and
+C    false, and since cmov's documentation is not clear about whether it
+C    actually reads both source operands and writes the register for a false
+C    condition, we cannot use it.
+C  * Given that we have a dedicated cnd_add_n, it might look strange that this
+C    file provides cnd_add_n and not just cnd_sub_n.  But that's harmless, and
+C    this file's generality might come in handy for some pipeline.
+
+C INPUT PARAMETERS
+define(`cnd_arg', `%rdi')	dnl rcx
+define(`rp',	  `%rsi')	dnl rdx
+define(`up',	  `%rdx')	dnl r8
+define(`vp',	  `%rcx')	dnl r9
+define(`n',	  `%r8')	dnl rsp+40
+
+define(`cnd',     `%rbx')
+
+ifdef(`OPERATION_cnd_add_n',`
+	define(ADDSUB,	add)
+	define(ADCSBB,	adc)
+	define(func,	mpn_cnd_add_n)')
+ifdef(`OPERATION_cnd_sub_n',`
+	define(ADDSUB,	sub)
+	define(ADCSBB,	sbb)
+	define(func,	mpn_cnd_sub_n)')
+
+MULFUNC_PROLOGUE(mpn_cnd_add_n mpn_cnd_sub_n)
+
+ABI_SUPPORT(DOS64)
+ABI_SUPPORT(STD64)
+
+ASM_START()
+	TEXT


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