[Gmp-commit] /var/hg/gmp: Test NO_ASM in addition to __GNUC__ in mpn/generic.

[mercurial at gmplib.org]

details:   /var/hg/gmp/rev/ba4b2f3c0574
changeset: 16495:ba4b2f3c0574
user:      Marc Glisse <marc.glisse at inria.fr>
date:      Sat Sep 13 22:58:19 2014 +0200
description:
Test NO_ASM in addition to __GNUC__ in mpn/generic.

diffstat:

 ChangeLog                   |  9 +++++++++
 mpn/generic/div_qr_1n_pi1.c |  2 +-
 mpn/generic/div_qr_1n_pi2.c |  2 +-
 mpn/generic/div_qr_1u_pi2.c |  2 +-
 mpn/generic/div_qr_2.c      |  2 +-
 mpn/generic/mod_1_1.c       |  2 +-
 mpn/generic/redc_2.c        |  3 ++-
 7 files changed, 16 insertions(+), 6 deletions(-)

diffs (89 lines):

diff -r fa68f9f88845 -r ba4b2f3c0574 ChangeLog
--- a/ChangeLog	Mon Sep 01 11:21:34 2014 +0200
+++ b/ChangeLog	Sat Sep 13 22:58:19 2014 +0200
@@ -1,3 +1,12 @@
+2014-09-13  Marc Glisse  <marc.glisse at inria.fr>
+
+	* mpn/generic/div_qr_1n_pi1.c: Honor NO_ASM.
+	* mpn/generic/div_qr_1n_pi2.c: Likewise.
+	* mpn/generic/div_qr_1u_pi2.c: Likewise.
+	* mpn/generic/div_qr_2.c: Likewise.
+	* mpn/generic/mod_1_1.c: Likewise.
+	* mpn/generic/redc_2.c: Likewise.
+
 2014-08-31  Torbjörn Granlund  <tege at gmplib.org>
 
 	* mpn/arm64/lshift.asm: New file.
diff -r fa68f9f88845 -r ba4b2f3c0574 mpn/generic/div_qr_1n_pi1.c
--- a/mpn/generic/div_qr_1n_pi1.c	Mon Sep 01 11:21:34 2014 +0200
+++ b/mpn/generic/div_qr_1n_pi1.c	Sat Sep 13 22:58:19 2014 +0200
@@ -49,7 +49,7 @@
 
 /* FIXME: Duplicated in mod_1_1.c. Move to gmp-impl.h */
 
-#if defined (__GNUC__)
+#if defined (__GNUC__) && ! defined (NO_ASM)
 
 #if HAVE_HOST_CPU_FAMILY_x86 && W_TYPE_SIZE == 32
 #define add_mssaaaa(m, s1, s0, a1, a0, b1, b0)				\
diff -r fa68f9f88845 -r ba4b2f3c0574 mpn/generic/div_qr_1n_pi2.c
--- a/mpn/generic/div_qr_1n_pi2.c	Mon Sep 01 11:21:34 2014 +0200
+++ b/mpn/generic/div_qr_1n_pi2.c	Sat Sep 13 22:58:19 2014 +0200
@@ -50,7 +50,7 @@
    * add_sssaaaa is like longlong.h's add_ssaaaa but propagating
      carry-out into an additional sum operand.
 */
-#if defined (__GNUC__)  && ! defined (__INTEL_COMPILER)
+#if defined (__GNUC__)  && ! defined (__INTEL_COMPILER) && ! defined (NO_ASM)
 
 #if HAVE_HOST_CPU_FAMILY_x86 && W_TYPE_SIZE == 32
 #define add_sssaaaa(s2, s1, s0, a1, a0, b1, b0)				\
diff -r fa68f9f88845 -r ba4b2f3c0574 mpn/generic/div_qr_1u_pi2.c
--- a/mpn/generic/div_qr_1u_pi2.c	Mon Sep 01 11:21:34 2014 +0200
+++ b/mpn/generic/div_qr_1u_pi2.c	Sat Sep 13 22:58:19 2014 +0200
@@ -50,7 +50,7 @@
    * add_sssaaaa is like longlong.h's add_ssaaaa but propagating
      carry-out into an additional sum operand.
 */
-#if defined (__GNUC__)  && ! defined (__INTEL_COMPILER)
+#if defined (__GNUC__)  && ! defined (__INTEL_COMPILER) && ! defined (NO_ASM)
 
 #if HAVE_HOST_CPU_FAMILY_x86 && W_TYPE_SIZE == 32
 #define add_sssaaaa(s2, s1, s0, a1, a0, b1, b0)				\
diff -r fa68f9f88845 -r ba4b2f3c0574 mpn/generic/div_qr_2.c
--- a/mpn/generic/div_qr_2.c	Mon Sep 01 11:21:34 2014 +0200
+++ b/mpn/generic/div_qr_2.c	Sat Sep 13 22:58:19 2014 +0200
@@ -55,7 +55,7 @@
    * add_csaac accepts two addends and a carry in, and generates a sum
      and a carry out.  A little like a "full adder".
 */
-#if defined (__GNUC__)  && ! defined (__INTEL_COMPILER)
+#if defined (__GNUC__)  && ! defined (__INTEL_COMPILER) && ! defined (NO_ASM)
 
 #if HAVE_HOST_CPU_FAMILY_x86 && W_TYPE_SIZE == 32
 #define add_sssaaaa(s2, s1, s0, a1, a0, b1, b0)				\
diff -r fa68f9f88845 -r ba4b2f3c0574 mpn/generic/mod_1_1.c
--- a/mpn/generic/mod_1_1.c	Mon Sep 01 11:21:34 2014 +0200
+++ b/mpn/generic/mod_1_1.c	Sat Sep 13 22:58:19 2014 +0200
@@ -48,7 +48,7 @@
  * add_mssaaaa is like longlong.h's add_ssaaaa, but also generates
  * carry out, in the form of a mask. */
 
-#if defined (__GNUC__)
+#if defined (__GNUC__) && ! defined (NO_ASM)
 
 #if HAVE_HOST_CPU_FAMILY_x86 && W_TYPE_SIZE == 32
 #define add_mssaaaa(m, s1, s0, a1, a0, b1, b0)				\
diff -r fa68f9f88845 -r ba4b2f3c0574 mpn/generic/redc_2.c
--- a/mpn/generic/redc_2.c	Mon Sep 01 11:21:34 2014 +0200
+++ b/mpn/generic/redc_2.c	Sat Sep 13 22:58:19 2014 +0200
@@ -53,7 +53,8 @@
 }
 #endif
 
-#if defined (__GNUC__) && defined (__ia64) && W_TYPE_SIZE == 64
+#if defined (__GNUC__) && ! defined (NO_ASM) \
+  && defined (__ia64) && W_TYPE_SIZE == 64
 #define umul2low(ph, pl, uh, ul, vh, vl) \
   do {									\
     mp_limb_t _ph, _pl;							\