[Gmp-commit] /var/hg/gmp: Avoid negative stack pointer references.
mercurial at gmplib.org
mercurial at gmplib.org
Mon Nov 3 19:38:41 UTC 2014
details: /var/hg/gmp/rev/e4647cdcc9ea
changeset: 16503:e4647cdcc9ea
user: Torbjorn Granlund <torbjorng at google.com>
date: Mon Nov 03 20:38:32 2014 +0100
description:
Avoid negative stack pointer references.
diffstat:
ChangeLog | 13 +++++++++++++
mpn/powerpc32/addmul_1.asm | 8 ++++++--
mpn/powerpc32/divrem_2.asm | 4 ++--
mpn/powerpc32/lshift.asm | 6 ++++--
mpn/powerpc32/lshiftc.asm | 6 ++++--
mpn/powerpc32/p3-p7/aors_n.asm | 21 +++++++++++----------
mpn/powerpc32/rshift.asm | 6 ++++--
mpn/powerpc32/sec_tabselect.asm | 6 ++++--
mpn/powerpc32/submul_1.asm | 8 ++++++--
mpn/powerpc32/vmx/mod_34lsub1.asm | 8 +++++---
10 files changed, 59 insertions(+), 27 deletions(-)
diffs (253 lines):
diff -r bfc8adc7cdfe -r e4647cdcc9ea ChangeLog
--- a/ChangeLog Mon Oct 13 21:35:45 2014 +0200
+++ b/ChangeLog Mon Nov 03 20:38:32 2014 +0100
@@ -1,3 +1,16 @@
+2014-11-03 Torbjörn Granlund <torbjorng at google.com>
+
+ * mpn/powerpc32/addmul_1.asm: Avoid negative stack pointer references.
+ * mpn/powerpc32/lshift.asm: Likewise.
+ * mpn/powerpc32/lshiftc.asm: Likewise.
+ * mpn/powerpc32/p3-p7/aors_n.asm: Likewise.
+ * mpn/powerpc32/rshift.asm: Likewise.
+ * mpn/powerpc32/sec_tabselect.asm: Likewise.
+ * mpn/powerpc32/submul_1.asm: Likewise.
+ * mpn/powerpc32/vmx/mod_34lsub1.asm: Likewise.
+
+ * mpn/powerpc32/divrem_2.asm: Slightly trim stack usage.
+
2014-10-13 Torbjörn Granlund <torbjorng at google.com>
* acinclude.m4 (freebsd hacked gcc): Test for crash-prone FreeBSD gcc.
diff -r bfc8adc7cdfe -r e4647cdcc9ea mpn/powerpc32/addmul_1.asm
--- a/mpn/powerpc32/addmul_1.asm Mon Oct 13 21:35:45 2014 +0200
+++ b/mpn/powerpc32/addmul_1.asm Mon Nov 03 20:38:32 2014 +0100
@@ -90,9 +90,11 @@
addze r3,r10
blr
-L(big): stmw r30,-32(r1)
+L(big): stwu r1,-16(r1)
addi r5,r5,-1
+ stw r30,8(r1)
srwi r0,r5,2
+ stw r31,12(r1)
mtctr r0
lwz r7,0(r4)
@@ -150,6 +152,8 @@
bdnz L(loopE)
L(endx):
addze r3,r0
- lmw r30,-32(r1)
+ lwz r30,8(r1)
+ lwz r31,12(r1)
+ addi r1,r1,16
blr
EPILOGUE(mpn_addmul_1)
diff -r bfc8adc7cdfe -r e4647cdcc9ea mpn/powerpc32/divrem_2.asm
--- a/mpn/powerpc32/divrem_2.asm Mon Oct 13 21:35:45 2014 +0200
+++ b/mpn/powerpc32/divrem_2.asm Mon Nov 03 20:38:32 2014 +0100
@@ -52,7 +52,7 @@
ASM_START()
PROLOGUE(mpn_divrem_2)
- stwu r1, -32(r1)
+ stwu r1, -16(r1)
slwi r0, r6, 2
add r5, r5, r0
stmw r28, 8(r1)
@@ -169,7 +169,7 @@
L(ret): stw r28, 0(r29)
stw r12, 4(r29)
lmw r28, 8(r1)
- addi r1, r1, 32
+ addi r1, r1, 16
blr
L(fix): cmplw cr6, r28, r7
diff -r bfc8adc7cdfe -r e4647cdcc9ea mpn/powerpc32/lshift.asm
--- a/mpn/powerpc32/lshift.asm Mon Oct 13 21:35:45 2014 +0200
+++ b/mpn/powerpc32/lshift.asm Mon Nov 03 20:38:32 2014 +0100
@@ -83,7 +83,8 @@
blr
L(BIG):
- stmw r24, -32(r1) C save registers we are supposed to preserve
+ stwu r1, -48(r1)
+ stmw r24, 8(r1) C save registers we are supposed to preserve
lwzu r9, -4(r4)
subfic r8, r6, 32
srw r3, r9, r8 C compute function return value
@@ -161,6 +162,7 @@
stw r27, -16(r7)
stw r12, -20(r7)
- lmw r24, -32(r1) C restore registers
+ lmw r24, 8(r1) C restore registers
+ addi r1, r1, 48
blr
EPILOGUE()
diff -r bfc8adc7cdfe -r e4647cdcc9ea mpn/powerpc32/lshiftc.asm
--- a/mpn/powerpc32/lshiftc.asm Mon Oct 13 21:35:45 2014 +0200
+++ b/mpn/powerpc32/lshiftc.asm Mon Nov 03 20:38:32 2014 +0100
@@ -85,7 +85,8 @@
blr
L(BIG):
- stmw r24, -32(r1) C save registers we are supposed to preserve
+ stwu r1, -48(r1)
+ stmw r24, 8(r1) C save registers we are supposed to preserve
lwzu r9, -4(r4)
subfic r8, r6, 32
srw r3, r9, r8 C compute function return value
@@ -163,6 +164,7 @@
stw r27, -16(r7)
nor r12, r12, r12
stw r12, -20(r7)
- lmw r24, -32(r1) C restore registers
+ lmw r24, 8(r1) C restore registers
+ addi r1, r1, 48
blr
EPILOGUE()
diff -r bfc8adc7cdfe -r e4647cdcc9ea mpn/powerpc32/p3-p7/aors_n.asm
--- a/mpn/powerpc32/p3-p7/aors_n.asm Mon Oct 13 21:35:45 2014 +0200
+++ b/mpn/powerpc32/p3-p7/aors_n.asm Mon Nov 03 20:38:32 2014 +0100
@@ -74,16 +74,16 @@
PROLOGUE(func)
CLRCB
-L(ent): stw r31, -4(r1)
- stw r30, -8(r1)
- stw r29, -12(r1)
- stw r28, -16(r1)
-
+L(ent): stwu r1, -32(r1)
rlwinm. r0, r6, 0,30,31 C r0 = n & 3, set cr0
cmpwi cr6, r0, 2
+ stw r28, 8(r1)
addi r6, r6, 3 C compute count...
+ stw r29, 12(r1)
srwi r6, r6, 2 C ...for ctr
+ stw r30, 16(r1)
mtctr r6 C copy count into ctr
+ stw r31, 20(r1)
beq cr0, L(b00)
blt cr6, L(b01)
beq cr6, L(b10)
@@ -175,12 +175,13 @@
stw r30, 8(r3)
stw r31, 12(r3)
-L(ret): lwz r31, -4(r1)
- lwz r30, -8(r1)
- lwz r29, -12(r1)
- lwz r28, -16(r1)
-
+L(ret):
+ lwz r28, 8(r1)
+ lwz r29, 12(r1)
subfe r3, r0, r0 C -cy
+ lwz r30, 16(r1)
GENRVAL
+ lwz r31, 20(r1)
+ addi r1, r1, 32
blr
EPILOGUE()
diff -r bfc8adc7cdfe -r e4647cdcc9ea mpn/powerpc32/rshift.asm
--- a/mpn/powerpc32/rshift.asm Mon Oct 13 21:35:45 2014 +0200
+++ b/mpn/powerpc32/rshift.asm Mon Nov 03 20:38:32 2014 +0100
@@ -81,7 +81,8 @@
blr
L(BIG):
- stmw r24, -32(r1) C save registers we are supposed to preserve
+ stwu r1, -48(r1)
+ stmw r24, 8(r1) C save registers we are supposed to preserve
lwz r9, 0(r4)
subfic r8, r6, 32
slw r3, r9, r8 C compute function return value
@@ -159,6 +160,7 @@
stw r27, 16(r7)
stw r12, 20(r7)
- lmw r24, -32(r1) C restore registers
+ lmw r24, 8(r1) C restore registers
+ addi r1, r1, 48
blr
EPILOGUE()
diff -r bfc8adc7cdfe -r e4647cdcc9ea mpn/powerpc32/sec_tabselect.asm
--- a/mpn/powerpc32/sec_tabselect.asm Mon Oct 13 21:35:45 2014 +0200
+++ b/mpn/powerpc32/sec_tabselect.asm Mon Nov 03 20:38:32 2014 +0100
@@ -55,8 +55,9 @@
ASM_START()
PROLOGUE(mpn_sec_tabselect)
+ stwu r1, -32(r1)
addic. j, n, -4 C outer loop induction variable
- stmw r27, -32(r1)
+ stmw r27, 8(r1)
slwi stride, n, 2
blt cr0, L(outer_end)
@@ -136,6 +137,7 @@
bdnz L(tp1)
stw r28, 0(rp)
-L(b00): lmw r27, -32(r1)
+L(b00): lmw r27, 8(r1)
+ addi r1, r1, 32
blr
EPILOGUE()
diff -r bfc8adc7cdfe -r e4647cdcc9ea mpn/powerpc32/submul_1.asm
--- a/mpn/powerpc32/submul_1.asm Mon Oct 13 21:35:45 2014 +0200
+++ b/mpn/powerpc32/submul_1.asm Mon Nov 03 20:38:32 2014 +0100
@@ -78,9 +78,11 @@
addze r3,r10
blr
-L(big): stmw r30,-32(r1)
+L(big): stwu r1,-16(r1)
addi r5,r5,-1
+ stw r30,8(r1)
srwi r0,r5,2
+ stw r31,12(r1)
mtctr r0
lwz r7,0(r4)
@@ -142,6 +144,8 @@
bdnz L(loopE)
L(endx):
addze r3,r0
- lmw r30,-32(r1)
+ lwz r30,8(r1)
+ lwz r31,12(r1)
+ addi r1,r1,16
blr
EPILOGUE(mpn_submul_1)
diff -r bfc8adc7cdfe -r e4647cdcc9ea mpn/powerpc32/vmx/mod_34lsub1.asm
--- a/mpn/powerpc32/vmx/mod_34lsub1.asm Mon Oct 13 21:35:45 2014 +0200
+++ b/mpn/powerpc32/vmx/mod_34lsub1.asm Mon Nov 03 20:38:32 2014 +0100
@@ -140,6 +140,7 @@
L(large):
+ stwu r1, -32(r1)
mfspr r10, 256
oris r0, r10, 0xffff C Set VRSAVE bit 0-15
mtspr 256, r0
@@ -341,11 +342,12 @@
C Reduce 32-bit fields
vsumsws x0, x0, z
- li r7, -16 C FIXME: does all ppc32 ABIs...
- stvx x0, r7, r1 C FIXME: ...support storing below sp?
- lwz r3, -4(r1)
+ li r7, 16
+ stvx x0, r7, r1
+ lwz r3, 28(r1)
mtspr 256, r10
+ addi r1, r1, 32
blr
EPILOGUE()
More information about the gmp-commit
mailing list