[Gmp-commit] /var/hg/gmp: 4 new changesets

mercurial at gmplib.org mercurial at gmplib.org
Fri Jan 3 23:10:53 UTC 2014


details:   /var/hg/gmp/rev/b8f691bd0d03
changeset: 16155:b8f691bd0d03
user:      Torbjorn Granlund <tege at gmplib.org>
date:      Fri Jan 03 21:46:39 2014 +0100
description:
(GMP_PROG_M4): Check that eval's radix argument work.

details:   /var/hg/gmp/rev/8e5bb84480d7
changeset: 16156:8e5bb84480d7
user:      Torbjorn Granlund <tege at gmplib.org>
date:      Fri Jan 03 22:33:59 2014 +0100
description:
Support newer haswell, broadwell, silvermont.

details:   /var/hg/gmp/rev/41cdc1eb4089
changeset: 16157:41cdc1eb4089
user:      Torbjorn Granlund <tege at gmplib.org>
date:      Sat Jan 04 00:03:16 2014 +0100
description:
Support newer haswell, broadwell, silvermont.

details:   /var/hg/gmp/rev/cc13da2c2730
changeset: 16158:cc13da2c2730
user:      Torbjorn Granlund <tege at gmplib.org>
date:      Sat Jan 04 00:10:48 2014 +0100
description:
ChangeLog

diffstat:

 ChangeLog            |   5 ++++
 acinclude.m4         |   4 ++-
 config.guess         |  57 ++++++++++++++++++++++++++++++---------------------
 mpn/x86_64/fat/fat.c |  13 ++++++++++-
 4 files changed, 52 insertions(+), 27 deletions(-)

diffs (143 lines):

diff -r 36723c2428f7 -r cc13da2c2730 ChangeLog
--- a/ChangeLog	Fri Jan 03 17:31:29 2014 +0100
+++ b/ChangeLog	Sat Jan 04 00:10:48 2014 +0100
@@ -1,5 +1,10 @@
 2014-01-03  Torbjorn Granlund  <tege at gmplib.org>
 
+	* config.guess: Support newer haswell, broadwell, silvermont.
+	* mpn/x86_64/fat/fat.c (__gmpn_cpuvec_init): Likewise.
+
+	* acinclude.m4 (GMP_PROG_M4): Check that eval's radix argument work.
+
 	* mpz/invert.c: Rely on gcdext for all operands, removing faulty
 	special case.
 	* tests/mpz/t-invert.c: Enforce correct behaviour for |mod| = 1.
diff -r 36723c2428f7 -r cc13da2c2730 acinclude.m4
--- a/acinclude.m4	Fri Jan 03 17:31:29 2014 +0100
+++ b/acinclude.m4	Sat Jan 04 00:10:48 2014 +0100
@@ -309,7 +309,9 @@
 ``bad: $][# not supported (SunOS /usr/bin/m4)
 '')ifelse(eval(89),89,`define(t2,Y)',
 `bad: eval() doesnt support 8 or 9 in a constant (OpenBSD 2.6 m4)
-')ifelse(t1`'t2,YY,`good
+')ifelse(eval(0xdeed,16),deed,`define(t3,Y)',
+`bad: eval() doesnt support radix in eval (FreeBSD 8.x,9.0,9.1,9.2 m4)
+')ifelse(t1`'t2`'t3,YYY,`good
 ')]
 EOF
 dnl ' <- balance the quotes for emacs sh-mode
diff -r 36723c2428f7 -r cc13da2c2730 config.guess
--- a/config.guess	Fri Jan 03 17:31:29 2014 +0100
+++ b/config.guess	Sat Jan 04 00:10:48 2014 +0100
@@ -3,7 +3,7 @@
 # GMP config.guess wrapper.
 
 
-# Copyright 2000-2006, 2008, 2011-2013 Free Software Foundation, Inc.
+# Copyright 2000-2006, 2008, 2011-2014 Free Software Foundation, Inc.
 #
 # This file is part of the GNU MP Library.
 #
@@ -771,29 +771,38 @@
 	  else if (model >= 4)	modelstr = "pentiummmx";
 	  break;
 	case 6:
-	  if (model <= 1)		modelstr = "pentiumpro";
-	  else if (model <= 6)		modelstr = "pentium2";
-	  else if (model <= 8)		modelstr = "pentium3";
-	  else if (model <= 9)		modelstr = "pentiumm";
-	  else if (model <= 0x0c)	modelstr = "pentium3";
-	  else if (model <= 0x0e)	modelstr = "pentiumm";
-	  else if (model <= 0x19)	cpu_64bit = 1, modelstr = "core2";
-	  else if (model == 0x1a)	cpu_64bit = 1, modelstr = "coreinhm"; /* NHM Gainestown */
-	  else if (model == 0x1c)	cpu_64bit = 1, modelstr = "atom";  /* Silverthorne */
-	  else if (model == 0x1d)	cpu_64bit = 1, modelstr = "core2"; /* PNR Dunnington */
-	  else if (model == 0x1e)	cpu_64bit = 1, modelstr = "coreinhm"; /* NHM Lynnfield/Jasper */
-	  else if (model == 0x25)	cpu_64bit = 1, modelstr = "coreiwsm"; /* WSM Clarkdale/Arrandale */
-	  else if (model == 0x26)	cpu_64bit = 1, modelstr = "atom";  /* Lincroft */
-	  else if (model == 0x27)	cpu_64bit = 1, modelstr = "atom";  /* Saltwell */
-	  else if (model == 0x2a)	cpu_64bit = 1, modelstr = "coreisbr"; /* SB */
-	  else if (model == 0x2c)	cpu_64bit = 1, modelstr = "coreiwsm"; /* WSM Gulftown */
-	  else if (model == 0x2d)	cpu_64bit = 1, modelstr = "coreisbr"; /* SBC-EP */
-	  else if (model == 0x2e)	cpu_64bit = 1, modelstr = "coreinhm"; /* NHM Beckton */
-	  else if (model == 0x2f)	cpu_64bit = 1, modelstr = "coreiwsm"; /* WSM Eagleton */
-	  else if (model == 0x3a)	cpu_64bit = 1, modelstr = "coreisbr"; /* IBR */
-	  else if (model == 0x3c)	cpu_64bit = 1, modelstr = "coreihwl"; /* Haswell */
-	  else if (model == 0x36)	cpu_64bit = 1, modelstr = "atom";  /* Cedarview/Saltwell */
-	  else cpu_64bit = 1, modelstr = "corei"; /* default */
+          if (model <= 1)                        modelstr = "pentiumpro";
+          else if (model <= 6)                   modelstr = "pentium2";
+          else if (model <= 8)                   modelstr = "pentium3";
+          else if (model <= 9)                   modelstr = "pentiumm";
+          else if (model <= 0x0c)                modelstr = "pentium3";
+          else if (model <= 0x0e)                modelstr = "pentiumm";
+          else if (model <= 0x19) cpu_64bit = 1, modelstr = "core2";
+          else if (model == 0x1a) cpu_64bit = 1, modelstr = "coreinhm"; /* NHM Gainestown */
+          else if (model == 0x1c) cpu_64bit = 1, modelstr = "atom";     /* Silverthorne */
+          else if (model == 0x1d) cpu_64bit = 1, modelstr = "core2";    /* PNR Dunnington */
+          else if (model == 0x1e) cpu_64bit = 1, modelstr = "coreinhm"; /* NHM Lynnfield/Jasper */
+          else if (model == 0x25) cpu_64bit = 1, modelstr = "coreiwsm"; /* WSM Clarkdale/Arrandale */
+          else if (model == 0x26) cpu_64bit = 1, modelstr = "atom";     /* Lincroft */
+          else if (model == 0x27) cpu_64bit = 1, modelstr = "atom";     /* Saltwell */
+          else if (model == 0x2a) cpu_64bit = 1, modelstr = "coreisbr"; /* SB */
+          else if (model == 0x2c) cpu_64bit = 1, modelstr = "coreiwsm"; /* WSM Gulftown */
+          else if (model == 0x2d) cpu_64bit = 1, modelstr = "coreisbr"; /* SBC-EP */
+          else if (model == 0x2e) cpu_64bit = 1, modelstr = "coreinhm"; /* NHM Beckton */
+          else if (model == 0x2f) cpu_64bit = 1, modelstr = "coreiwsm"; /* WSM Eagleton */
+          else if (model == 0x36) cpu_64bit = 1, modelstr = "atom";     /* Cedarview/Saltwell */
+          else if (model == 0x37) cpu_64bit = 1, modelstr = "coreinhm"; /* Atom Silvermont */
+          else if (model == 0x3a) cpu_64bit = 1, modelstr = "coreisbr"; /* IBR */
+          else if (model == 0x3c) cpu_64bit = 1, modelstr = "coreihwl"; /* Haswell client */
+          else if (model == 0x3d) cpu_64bit = 1, modelstr = "coreibwl"; /* Broadwell */
+          else if (model == 0x3e) cpu_64bit = 1, modelstr = "coreisbr"; /* Ivytown */
+          else if (model == 0x3f) cpu_64bit = 1, modelstr = "coreihwl"; /* Haswell server */
+          else if (model == 0x45) cpu_64bit = 1, modelstr = "coreihwl"; /* Haswell ULT */
+          else if (model == 0x46) cpu_64bit = 1, modelstr = "coreihwl"; /* Crystal Well */
+          else if (model == 0x4d) cpu_64bit = 1, modelstr = "coreinhm"; /* Silvermont/Avoton */
+          else if (model == 0x4f) cpu_64bit = 1, modelstr = "coreibwl"; /* Broadwell server */
+          else if (model == 0x56) cpu_64bit = 1, modelstr = "coreibwl"; /* Broadwell microserver */
+          else cpu_64bit = 1, modelstr = "corei"; /* default */
 	  break;
 	case 15:
 	  cpu_64bit = 1, modelstr = "pentium4";
diff -r 36723c2428f7 -r cc13da2c2730 mpn/x86_64/fat/fat.c
--- a/mpn/x86_64/fat/fat.c	Fri Jan 03 17:31:29 2014 +0100
+++ b/mpn/x86_64/fat/fat.c	Sat Jan 04 00:10:48 2014 +0100
@@ -7,7 +7,7 @@
    THEY'RE ALMOST CERTAIN TO BE SUBJECT TO INCOMPATIBLE CHANGES OR DISAPPEAR
    COMPLETELY IN FUTURE GNU MP RELEASES.
 
-Copyright 2003, 2004, 2009, 2011-2013 Free Software Foundation, Inc.
+Copyright 2003, 2004, 2009, 2011-2014 Free Software Foundation, Inc.
 
 This file is part of the GNU MP Library.
 
@@ -253,6 +253,8 @@
 	    case 0x2c:		/* WSM Gulftown */
 	    case 0x2e:		/* NHM Beckton */
 	    case 0x2f:		/* WSM Eagleton */
+	    case 0x37:		/* Atom Silvermont */
+	    case 0x4d:		/* Atom Silvermont/Avoton */
 	      CPUVEC_SETUP_core2;
 	      CPUVEC_SETUP_coreinhm;
 	      break;
@@ -260,11 +262,18 @@
 	    case 0x2a:		/* SB */
 	    case 0x2d:		/* SBC-EP */
 	    case 0x3a:		/* IBR */
+	    case 0x3e:		/* IBR Ivytown */
 	      CPUVEC_SETUP_core2;
 	      CPUVEC_SETUP_coreinhm;
 	      CPUVEC_SETUP_coreisbr;
 	      break;
-	    case 0x3c:		/* Haswell */
+	    case 0x3c:		/* Haswell client */
+	    case 0x3d:		/* Broadwell */
+	    case 0x3f:		/* Haswell server */
+	    case 0x45:		/* Haswell ULT */
+	    case 0x46:		/* Crystal Well */
+	    case 0x4f:		/* Broadwell server */
+	    case 0x56:		/* Broadwell microserver */
 	      CPUVEC_SETUP_core2;
 	      CPUVEC_SETUP_coreinhm;
 	      CPUVEC_SETUP_coreisbr;


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