[Gmp-commit] /var/hg/gmp: 3 new changesets

mercurial at gmplib.org mercurial at gmplib.org
Fri Feb 15 16:59:33 CET 2013


details:   /var/hg/gmp/rev/6f6d95eb6536
changeset: 15440:6f6d95eb6536
user:      Torbjorn Granlund <tege at gmplib.org>
date:      Fri Feb 15 16:56:18 2013 +0100
description:
Initial arm64 asm files.

details:   /var/hg/gmp/rev/74e051a138cb
changeset: 15441:74e051a138cb
user:      Torbjorn Granlund <tege at gmplib.org>
date:      Fri Feb 15 16:57:46 2013 +0100
description:
(arm64*-*-*): Match this.

details:   /var/hg/gmp/rev/a93ba1564436
changeset: 15442:a93ba1564436
user:      Torbjorn Granlund <tege at gmplib.org>
date:      Fri Feb 15 16:59:27 2013 +0100
description:
ChangeLog

diffstat:

 ChangeLog              |   8 ++++
 configure.ac           |   5 ++
 mpn/arm64/addmul_1.asm |  97 ++++++++++++++++++++++++++++++++++++++++++++++++++
 mpn/arm64/aors_n.asm   |  75 ++++++++++++++++++++++++++++++++++++++
 mpn/arm64/mul_1.asm    |  87 ++++++++++++++++++++++++++++++++++++++++++++
 5 files changed, 272 insertions(+), 0 deletions(-)

diffs (truncated from 301 to 300 lines):

diff -r 538dbbb66bb1 -r a93ba1564436 ChangeLog
--- a/ChangeLog	Fri Feb 15 14:49:43 2013 +0100
+++ b/ChangeLog	Fri Feb 15 16:59:27 2013 +0100
@@ -1,3 +1,11 @@
+2013-02-15  Torbjorn Granlund  <tege at gmplib.org>
+
+	* configure.ac (arm64*-*-*): Match this.
+
+	* mpn/arm64/aors_n.asm: New file.
+	* mpn/arm64/addmul_1.asm: New file.
+	* mpn/arm64/mul_1.asm: New file.
+
 2013-02-15  Marc Glisse  <marc.glisse at inria.fr>
 
 	* gmpxx.h (__GMPXX_DEFINE_ARITHMETIC_CONSTRUCTORS,
diff -r 538dbbb66bb1 -r a93ba1564436 configure.ac
--- a/configure.ac	Fri Feb 15 14:49:43 2013 +0100
+++ b/configure.ac	Fri Feb 15 16:59:27 2013 +0100
@@ -606,6 +606,11 @@
     ;;
 
 
+  arm64*-*-* | aarch64*-*-*)
+    path="arm64"
+    ;;
+
+
   clipper*-*-*)
     path="clipper"
     ;;
diff -r 538dbbb66bb1 -r a93ba1564436 mpn/arm64/addmul_1.asm
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/mpn/arm64/addmul_1.asm	Fri Feb 15 16:59:27 2013 +0100
@@ -0,0 +1,97 @@
+dnl  ARM64 mpn_addmul_1
+
+dnl  Contributed to the GNU project by Torbjörn Granlund.
+
+dnl  Copyright 2013 Free Software Foundation, Inc.
+
+dnl  This file is part of the GNU MP Library.
+
+dnl  The GNU MP Library is free software; you can redistribute it and/or modify
+dnl  it under the terms of the GNU Lesser General Public License as published
+dnl  by the Free Software Foundation; either version 3 of the License, or (at
+dnl  your option) any later version.
+
+dnl  The GNU MP Library is distributed in the hope that it will be useful, but
+dnl  WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+dnl  or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU Lesser General Public
+dnl  License for more details.
+
+dnl  You should have received a copy of the GNU Lesser General Public License
+dnl  along with the GNU MP Library.  If not, see http://www.gnu.org/licenses/.
+
+include(`../config.m4')
+
+C	     cycles/limb
+C Cortex-A53	 ?
+C Cortex-A57	 ?
+
+define(`rp', `x0')
+define(`up', `x1')
+define(`n',  `x2')
+define(`v0', `x3')
+
+ASM_START()
+PROLOGUE(mpn_addmul_1)
+	ldr	x12, [up], #8
+	and	x6, n, #3
+	and	n, n, #-4
+	cbz	x6, L(fi0)
+	cmp	x6, #2
+	bcc	L(fi1)
+	beq	L(fi2)
+
+L(fi3):	mul	x8, x12, v0
+	umulh	x7, x12, v0
+	b	L(L3)
+L(fi2):	mul	x7, x12, v0
+	umulh	x10, x12, v0
+	b	L(L2)
+L(fi0):	mul	x9, x12, v0
+	umulh	x8, x12, v0
+	sub	n, n, #4
+	b	L(L0)
+L(fi1):	mul	x10, x12, v0
+	umulh	x9, x12, v0
+	cbz	n, L(end)
+
+L(top):	sub	n, n, #4
+	ldr	x12, [up], #8
+	ldr	x11, [rp]
+	mul	x6, x12, v0
+	umulh	x5, x12, v0
+	adds	x10, x10, x11
+	str	x10, [rp], #8
+	adcs	x9, x6, x9
+	adc	x8, x5, xzr
+L(L0):	ldr	x12, [up], #8
+	ldr	x11, [rp]
+	mul	x6, x12, v0
+	umulh	x5, x12, v0
+	adds	x9, x9, x11
+	str	x9, [rp] ,#8
+	adcs	x8, x6, x8
+	adc	x7, x5, xzr
+L(L3):	ldr	x12, [up], #8
+	ldr	x11, [rp]
+	mul	x6, x12, v0
+	umulh	x5, x12, v0
+	adds	x8, x8, x11
+	str	x8, [rp], #8
+	adcs	x7, x6, x7
+	adc	x10, x5, xzr
+L(L2):	ldr	x12, [up], #8
+	ldr	x11, [rp]
+	mul	x6, x12, v0
+	umulh	x5, x12, v0
+	adds	x7, x7, x11
+	str	x7, [rp], #8
+	adcs	x10, x6, x10
+	adc	x9, x5, xzr
+	cbnz	n, L(top)
+
+L(end):	ldr	x11, [rp]
+	adds	x10, x10, x11
+	str	x10, [rp]
+	adc	x0, x9, xzr
+	ret
+EPILOGUE()
diff -r 538dbbb66bb1 -r a93ba1564436 mpn/arm64/aors_n.asm
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/mpn/arm64/aors_n.asm	Fri Feb 15 16:59:27 2013 +0100
@@ -0,0 +1,75 @@
+dnl  ARM64 mpn_add_n and mpn_sub_n
+
+dnl  Contributed to the GNU project by Torbjörn Granlund.
+
+dnl  Copyright 2013 Free Software Foundation, Inc.
+
+dnl  This file is part of the GNU MP Library.
+
+dnl  The GNU MP Library is free software; you can redistribute it and/or modify
+dnl  it under the terms of the GNU Lesser General Public License as published
+dnl  by the Free Software Foundation; either version 3 of the License, or (at
+dnl  your option) any later version.
+
+dnl  The GNU MP Library is distributed in the hope that it will be useful, but
+dnl  WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+dnl  or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU Lesser General Public
+dnl  License for more details.
+
+dnl  You should have received a copy of the GNU Lesser General Public License
+dnl  along with the GNU MP Library.  If not, see http://www.gnu.org/licenses/.
+
+include(`../config.m4')
+
+C	     cycles/limb
+C Cortex-A53	 ?
+C Cortex-A57	 ?
+
+define(`rp', `r0')
+define(`up', `r1')
+define(`vp', `r2')
+define(`n',  `r3')
+
+ifdef(`OPERATION_add_n', `
+  define(`ADDSUB',	adds)
+  define(`ADDSUBC',	adcs)
+  define(`CLRCY',	`cmn	xzr, xzr')
+  define(`SETCY',	`cmp	$1, #1')
+  define(`RETVAL',	`adc	x0, xzr, xzr')
+  define(`func',	mpn_add_n)
+  define(`func_nc',	mpn_add_nc)')
+ifdef(`OPERATION_sub_n', `
+  define(`ADDSUB',	subs)
+  define(`ADDSUBC',	sbcs)
+  define(`CLRCY',	`cmp	xzr, xzr')
+  define(`SETCY',	`rsbs	$1, $1, xzr')
+  define(`RETVAL',	`sbc	x0, xzr, xzr
+			and	x0, x0, #1')
+  define(`func',	mpn_sub_n)
+  define(`func_nc',	mpn_sub_nc)')
+
+MULFUNC_PROLOGUE(mpn_add_n mpn_add_nc mpn_sub_n mpn_sub_nc)
+
+ASM_START()
+PROLOGUE(func_nc)
+	SETCY(	x4)
+	b	L(ent)
+EPILOGUE()
+PROLOGUE(func)
+	CLRCY
+L(ent):	lsl	x3, x3, #3
+	add	x0, x0, x3
+	add	x1, x1, x3
+	add	x2, x2, x3
+	neg	x3, x3
+
+L(top):	ldr	x6, [x1,x3]
+	ldr	x5, [x2,x3]
+	adcs	x7, x6, x5
+	str	x7, [x0,x3]
+	add	x3, x3, #8
+	cbnz	x3, L(top)
+
+	adc	x0, xzr, xzr
+	ret
+EPILOGUE()
diff -r 538dbbb66bb1 -r a93ba1564436 mpn/arm64/mul_1.asm
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/mpn/arm64/mul_1.asm	Fri Feb 15 16:59:27 2013 +0100
@@ -0,0 +1,87 @@
+dnl  ARM64 mpn_mul_1
+
+dnl  Contributed to the GNU project by Torbjörn Granlund.
+
+dnl  Copyright 2013 Free Software Foundation, Inc.
+
+dnl  This file is part of the GNU MP Library.
+
+dnl  The GNU MP Library is free software; you can redistribute it and/or modify
+dnl  it under the terms of the GNU Lesser General Public License as published
+dnl  by the Free Software Foundation; either version 3 of the License, or (at
+dnl  your option) any later version.
+
+dnl  The GNU MP Library is distributed in the hope that it will be useful, but
+dnl  WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+dnl  or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU Lesser General Public
+dnl  License for more details.
+
+dnl  You should have received a copy of the GNU Lesser General Public License
+dnl  along with the GNU MP Library.  If not, see http://www.gnu.org/licenses/.
+
+include(`../config.m4')
+
+C	     cycles/limb
+C Cortex-A53	 ?
+C Cortex-A57	 ?
+
+define(`rp', `x0')
+define(`up', `x1')
+define(`n',  `x2')
+define(`v0', `x3')
+
+ASM_START()
+PROLOGUE(mpn_mul_1)
+	ldr	x12, [up], #8
+	and	x6, n, #3
+	and	n, n, #-4
+	cbz	x6, L(fi0)
+	cmp	x6, #2
+	bcc	L(fi1)
+	beq	L(fi2)
+
+L(fi3):	mul	x8, x12, v0
+	umulh	x13, x12, v0
+	cmn	xzr, xzr
+	b	L(L3)
+L(fi2):	mul	x7, x12, v0
+	umulh	x5, x12, v0
+	cmn	xzr, xzr
+	b	L(L2)
+L(fi0):	mul	x9, x12, v0
+	umulh	x5, x12, v0
+	sub	n, n, #4
+	cmn	xzr, xzr
+	b	L(L0)
+L(fi1):	mul	x10, x12, v0
+	umulh	x13, x12, v0
+	cmn	xzr, xzr
+	cbz	n, L(end)
+
+L(top):	sub	n, n, #4
+	ldr	x12, [up], #8
+	mul	x6, x12, v0
+	umulh	x5, x12, v0
+	str	x10, [rp], #8
+	adcs	x9, x6, x13
+L(L0):	ldr	x12, [up], #8
+	mul	x6, x12, v0
+	umulh	x13, x12, v0
+	str	x9, [rp] ,#8
+	adcs	x8, x6, x5
+L(L3):	ldr	x12, [up], #8
+	mul	x6, x12, v0
+	umulh	x5, x12, v0
+	str	x8, [rp], #8
+	adcs	x7, x6, x13
+L(L2):	ldr	x12, [up], #8
+	mul	x6, x12, v0
+	umulh	x13, x12, v0
+	str	x7, [rp], #8
+	adcs	x10, x6, x5
+	cbnz	n, L(top)
+
+L(end):	str	x10, [rp]
+	adc	x0, x13, xzr
+	ret


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