[Gmp-commit] /var/hg/gmp: 3 new changesets
mercurial at gmplib.org
mercurial at gmplib.org
Sun Aug 4 01:44:16 CEST 2013
details: /var/hg/gmp/rev/33e27ea92aaa
changeset: 15914:33e27ea92aaa
user: Torbjorn Granlund <tege at gmplib.org>
date: Sat Aug 03 18:01:53 2013 +0200
description:
Provide haswell mul_2 and addmul_2.
details: /var/hg/gmp/rev/53fb8e2e7096
changeset: 15915:53fb8e2e7096
user: Torbjorn Granlund <tege at gmplib.org>
date: Sat Aug 03 18:03:24 2013 +0200
description:
Comment edits.
details: /var/hg/gmp/rev/d7b9f9b97a96
changeset: 15916:d7b9f9b97a96
user: Torbjorn Granlund <tege at gmplib.org>
date: Sat Aug 03 18:04:08 2013 +0200
description:
ChangeLog
diffstat:
ChangeLog | 5 +
mpn/x86_64/coreihwl/mulx/addmul_2.asm | 227 +++++++++++++++++++++++++++++++++
mpn/x86_64/coreihwl/mulx/aorsmul_1.asm | 11 +-
mpn/x86_64/coreihwl/mulx/mul_2.asm | 159 +++++++++++++++++++++++
4 files changed, 398 insertions(+), 4 deletions(-)
diffs (truncated from 445 to 300 lines):
diff -r 6239eb7defff -r d7b9f9b97a96 ChangeLog
--- a/ChangeLog Sat Aug 03 02:50:20 2013 +0200
+++ b/ChangeLog Sat Aug 03 18:04:08 2013 +0200
@@ -1,5 +1,10 @@
2013-08-03 Torbjorn Granlund <tege at gmplib.org>
+ * mpn/x86_64/coreihwl/mulx/mul_2.asm: New file.
+ * mpn/x86_64/coreihwl/mulx/addmul_2.asm: New file.
+
+ * mpn/x86_64/coreinhm/aorsmul_1.asm: New file.
+
* mpn/x86_64/coreisbr/mul_basecase.asm: Save some O(n) and O(1) cycles.
* mpn/x86_64/coreisbr/mul_2.asm: New file.
diff -r 6239eb7defff -r d7b9f9b97a96 mpn/x86_64/coreihwl/mulx/addmul_2.asm
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/mpn/x86_64/coreihwl/mulx/addmul_2.asm Sat Aug 03 18:04:08 2013 +0200
@@ -0,0 +1,227 @@
+dnl AMD64 mpn_addmul_2 optimised for Intel Haswell.
+
+dnl Contributed to the GNU project by Torbjörn Granlund.
+
+dnl Copyright 2013 Free Software Foundation, Inc.
+
+dnl This file is part of the GNU MP Library.
+
+dnl The GNU MP Library is free software; you can redistribute it and/or modify
+dnl it under the terms of the GNU Lesser General Public License as published
+dnl by the Free Software Foundation; either version 3 of the License, or (at
+dnl your option) any later version.
+
+dnl The GNU MP Library is distributed in the hope that it will be useful, but
+dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public
+dnl License for more details.
+
+dnl You should have received a copy of the GNU Lesser General Public License
+dnl along with the GNU MP Library. If not, see http://www.gnu.org/licenses/.
+
+include(`../config.m4')
+
+C cycles/limb
+C AMD K8,K9 n/a
+C AMD K10 n/a
+C AMD bull n/a
+C AMD pile n/a
+C AMD steam ?
+C AMD bobcat n/a
+C AMD jaguar ?
+C Intel P4 n/a
+C Intel core n/a
+C Intel NHM n/a
+C Intel SBR n/a
+C Intel IBR n/a
+C Intel HWL 2.15
+C Intel BWL ?
+C Intel atom n/a
+C VIA nano n/a
+
+C The loop of this code is the result of running a code generation and
+C optimisation tool suite written by David Harvey and Torbjörn Granlund.
+
+define(`rp', `%rdi')
+define(`up', `%rsi')
+define(`n_param',`%rdx')
+define(`vp', `%rcx')
+
+define(`v0', `%r8')
+define(`v1', `%r9')
+define(`w0', `%rbx')
+define(`w1', `%rcx')
+define(`w2', `%rbp')
+define(`w3', `%r10')
+define(`n', `%r11')
+define(`X0', `%r12')
+define(`X1', `%r13')
+
+ABI_SUPPORT(DOS64)
+ABI_SUPPORT(STD64)
+
+ASM_START()
+ TEXT
+ ALIGN(32)
+PROLOGUE(mpn_addmul_2)
+ FUNC_ENTRY(4)
+ push %rbx
+ push %rbp
+ push %r12
+ push %r13
+
+ mov (vp), v0
+ mov 8(vp), v1
+
+ mov n_param, n
+ shr $2, n
+
+ test $1, R8(n_param)
+ jnz L(bx1)
+
+L(bx0): mov (rp), X0
+ mov 8(rp), X1
+ test $2, R8(n_param)
+ jnz L(b10)
+
+L(b00): mov (up), %rdx
+ lea 16(up), up
+ mulx v0, %rax, w1
+ add %rax, X0
+ mulx v1, %rax, w2
+ adc $0, w1
+ mov X0, (rp)
+ add %rax, X1
+ adc $0, w2
+ mov -8(up), %rdx
+ lea 16(rp), rp
+ jmp L(lo0)
+
+L(b10): mov (up), %rdx
+ inc n
+ mulx v0, %rax, w1
+ add %rax, X0
+ adc $0, w1
+ mulx v1, %rax, w2
+ mov X0, (rp)
+ mov 16(rp), X0
+ add %rax, X1
+ adc $0, w2
+ xor w0, w0
+ jmp L(lo2)
+
+L(bx1): mov (rp), X1
+ mov 8(rp), X0
+ test $2, R8(n_param)
+ jnz L(b11)
+
+L(b01): mov (up), %rdx
+ mulx v0, %rax, w3
+ add %rax, X1
+ adc $0, w3
+ mulx v1, %rax, w0
+ add %rax, X0
+ adc $0, w0
+ mov 8(up), %rdx
+ mov X1, (rp)
+ mov 16(rp), X1
+ mulx v0, %rax, w1
+ lea 24(rp), rp
+ lea 24(up), up
+ jmp L(lo1)
+
+L(b11): mov (up), %rdx
+ inc n
+ mulx v0, %rax, w3
+ add %rax, X1
+ adc $0, w3
+ mulx v1, %rax, w0
+ add %rax, X0
+ adc $0, w0
+ mov X1, (rp)
+ mov 8(up), %rdx
+ mulx v0, %rax, w1
+ lea 8(rp), rp
+ lea 8(up), up
+ jmp L(lo3)
+
+ ALIGN(16)
+L(top): mulx v0, %rax, w3
+ add w0, X1
+ adc $0, w2
+ add %rax, X1
+ adc $0, w3
+ mulx v1, %rax, w0
+ add %rax, X0
+ adc $0, w0
+ lea 32(rp), rp
+ add w1, X1
+ mov -16(up), %rdx
+ mov X1, -24(rp)
+ adc $0, w3
+ add w2, X0
+ mov -8(rp), X1
+ mulx v0, %rax, w1
+ adc $0, w0
+L(lo1): add %rax, X0
+ mulx v1, %rax, w2
+ adc $0, w1
+ add w3, X0
+ mov X0, -16(rp)
+ adc $0, w1
+ add %rax, X1
+ adc $0, w2
+ add w0, X1
+ mov -8(up), %rdx
+ adc $0, w2
+L(lo0): mulx v0, %rax, w3
+ add %rax, X1
+ adc $0, w3
+ mov (rp), X0
+ mulx v1, %rax, w0
+ add %rax, X0
+ adc $0, w0
+ add w1, X1
+ mov X1, -8(rp)
+ adc $0, w3
+ mov (up), %rdx
+ add w2, X0
+ mulx v0, %rax, w1
+ adc $0, w0
+L(lo3): add %rax, X0
+ adc $0, w1
+ mulx v1, %rax, w2
+ add w3, X0
+ mov 8(rp), X1
+ mov X0, (rp)
+ mov 16(rp), X0
+ adc $0, w1
+ add %rax, X1
+ adc $0, w2
+L(lo2): mov 8(up), %rdx
+ lea 32(up), up
+ dec n
+ jnz L(top)
+
+L(end): mulx v0, %rax, w3
+ add w0, X1
+ adc $0, w2
+ add %rax, X1
+ adc $0, w3
+ mulx v1, %rdx, %rax
+ add w1, X1
+ mov X1, 8(rp)
+ adc $0, w3
+ add w2, %rdx
+ adc $0, %rax
+ add w3, %rdx
+ mov %rdx, 16(rp)
+ adc $0, %rax
+
+ pop %r13
+ pop %r12
+ pop %rbp
+ pop %rbx
+ FUNC_EXIT()
+ ret
+EPILOGUE()
diff -r 6239eb7defff -r d7b9f9b97a96 mpn/x86_64/coreihwl/mulx/aorsmul_1.asm
--- a/mpn/x86_64/coreihwl/mulx/aorsmul_1.asm Sat Aug 03 02:50:20 2013 +0200
+++ b/mpn/x86_64/coreihwl/mulx/aorsmul_1.asm Sat Aug 03 18:04:08 2013 +0200
@@ -1,5 +1,7 @@
dnl AMD64 mpn_addmul_1 and mpn_submul_1 optimised for Intel Haswell.
+dnl Contributed to the GNU project by Torbjörn Granlund.
+
dnl Copyright 2013 Free Software Foundation, Inc.
dnl This file is part of the GNU MP Library.
@@ -22,12 +24,13 @@
C cycles/limb
C AMD K8,K9 n/a
C AMD K10 n/a
-C AMD bd1 n/a
-C AMD bd2 ?
+C AMD bull n/a
+C AMD pile n/a
+C AMD steam ?
C AMD bobcat n/a
C AMD jaguar ?
C Intel P4 n/a
-C Intel PNR n/a
+C Intel core n/a
C Intel NHM n/a
C Intel SBR n/a
C Intel IBR n/a
@@ -37,7 +40,7 @@
C VIA nano n/a
C The loop of this code is the result of running a code generation and
-C optimisation tool suite written by David Harvey and Torbjorn Granlund.
+C optimisation tool suite written by David Harvey and Torbjörn Granlund.
C TODO
C * Handle small n separately, for lower overhead.
diff -r 6239eb7defff -r d7b9f9b97a96 mpn/x86_64/coreihwl/mulx/mul_2.asm
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/mpn/x86_64/coreihwl/mulx/mul_2.asm Sat Aug 03 18:04:08 2013 +0200
@@ -0,0 +1,159 @@
+dnl AMD64 mpn_mul_2 optimised for Intel Haswell.
+
+dnl Contributed to the GNU project by Torbjörn Granlund.
+
+dnl Copyright 2013 Free Software Foundation, Inc.
+
+dnl This file is part of the GNU MP Library.
+
+dnl The GNU MP Library is free software; you can redistribute it and/or modify
+dnl it under the terms of the GNU Lesser General Public License as published
+dnl by the Free Software Foundation; either version 3 of the License, or (at
+dnl your option) any later version.
+
+dnl The GNU MP Library is distributed in the hope that it will be useful, but
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