[Gmp-commit] /var/hg/gmp: Fix typo in coreisbr recognition.

[mercurial at gmplib.org]

details:   /var/hg/gmp/rev/74a39ab15a41
changeset: 14781:74a39ab15a41
user:      Torbjorn Granlund <tege at gmplib.org>
date:      Tue Mar 27 08:25:08 2012 +0200
description:
Fix typo in coreisbr recognition.

diffstat:

 ChangeLog    |  4 ++++
 config.guess |  2 +-
 2 files changed, 5 insertions(+), 1 deletions(-)

diffs (23 lines):

diff -r 0e5486f3204c -r 74a39ab15a41 ChangeLog
--- a/ChangeLog	Mon Mar 26 08:01:31 2012 +0200
+++ b/ChangeLog	Tue Mar 27 08:25:08 2012 +0200
@@ -1,3 +1,7 @@
+2012-03-27  Torbjorn Granlund  <tege at gmplib.org>
+
+	* config.guess: Fix typo in coreisbr recognition.
+
 2012-03-26 Marco Bodrato <bodrato at mail.dm.unipi.it>
 
 	* mpn/x86_64/gcd_1.asm: Reduce latency.
diff -r 0e5486f3204c -r 74a39ab15a41 config.guess
--- a/config.guess	Mon Mar 26 08:01:31 2012 +0200
+++ b/config.guess	Tue Mar 27 08:25:08 2012 +0200
@@ -777,7 +777,7 @@
 	  else if (model == 0x27)	cpu_64bit = 1, modelstr = "atom";  /* Saltwell */
 	  else if (model == 0x2a)	cpu_64bit = 1, modelstr = "coreisbr"; /* SB */
 	  else if (model == 0x2c)	cpu_64bit = 1, modelstr = "coreiwsm"; /* WSM Gulftown */
-	  else if (model == 0x2d)	cpu_64bit = 1, modelstr = "coreisrb"; /* SBC-EP */
+	  else if (model == 0x2d)	cpu_64bit = 1, modelstr = "coreisbr"; /* SBC-EP */
 	  else if (model == 0x2e)	cpu_64bit = 1, modelstr = "coreinhm"; /* NHM Beckton */
 	  else if (model == 0x2f)	cpu_64bit = 1, modelstr = "coreiwsm"; /* WSM Eagleton */
 	  else cpu_64bit = 1, modelstr = "corei"; /* default */