[Gmp-commit] /var/hg/gmp-5.0: Merge s390 changes from mainline repo.
mercurial at gmplib.org
mercurial at gmplib.org
Tue Jan 24 23:19:29 CET 2012
details: /var/hg/gmp-5.0/rev/0f3da428d970
changeset: 13521:0f3da428d970
user: Torbjorn Granlund <tege at gmplib.org>
date: Tue Jan 24 23:19:24 2012 +0100
description:
Merge s390 changes from mainline repo.
diffstat:
ChangeLog | 61 +++++++++++++++++-
acinclude.m4 | 6 +
configure.in | 80 ++++++++++++++++++++++-
longlong.h | 159 ++++++++++++++++++++++++++++++++++++++++++++--
mpn/Makefile.am | 8 +-
mpn/s390/README | 37 ----------
mpn/s390/addmul_1.asm | 82 ------------------------
mpn/s390/gmp-mparam.h | 54 ---------------
mpn/s390/mul_1.asm | 74 ---------------------
mpn/s390/submul_1.asm | 82 ------------------------
mpn/s390_32/README | 37 ++++++++++
mpn/s390_32/addmul_1.asm | 82 ++++++++++++++++++++++++
mpn/s390_32/gmp-mparam.h | 122 ++++++++++++++++++++++++++++++++++++
mpn/s390_32/mul_1.asm | 74 +++++++++++++++++++++
mpn/s390_32/submul_1.asm | 82 ++++++++++++++++++++++++
mpn/s390_64/gmp-mparam.h | 125 ++++++++++++++++++++++++++++++++++++
16 files changed, 819 insertions(+), 346 deletions(-)
diffs (truncated from 1320 to 300 lines):
diff -r 743acaeab0bc -r 0f3da428d970 ChangeLog
--- a/ChangeLog Tue Jan 24 19:29:16 2012 +0100
+++ b/ChangeLog Tue Jan 24 23:19:24 2012 +0100
@@ -1,7 +1,9 @@
+2012-01-24 Torbjorn Granlund <tege at gmplib.org>
+
+ * Version 5.0.3 released.
+
2012-01-23 Torbjorn Granlund <tege at gmplib.org>
- * Version 5.0.3 released.
-
* mpn/powerpc64/mode64/p6/gmp-mparam.h: New file.
* mpn/powerpc64/mode64/p7/gmp-mparam.h: New file.
* mpn/x86_64/bobcat/gmp-mparam.h: New file.
@@ -83,24 +85,79 @@
* mpn/generic/powm_sec.c (mpn_powm_sec): Use mpn_tabselect also in
initialisation.
+2011-10-15 Torbjorn Granlund <tege at gmplib.org>
+
+ * configure.in (s390): Rewrite support to handle known CPUs.
+ * config.guess: Recognise s390 CPUs.
+ * config.sub: Match s390 CPUs.
+ * acinclude.m4 (S390_PATTERN, S390X_PATTERN): New defines.
+
2011-10-14 Torbjorn Granlund <tege at gmplib.org>
From Per Olofsson:
* mpn/generic/popham.c: Add __GMP_NOTHROW to make it match gmp.h.
+ * configure.in: AC_DEFINE HAVE_HOST_CPU_s390_zarch.
+ * longlong.h (s390): Use it.
+ (s390 umul_ppmm): Fix typo in pure C variant.
+
+2011-10-13 Torbjorn Granlund <tege at gmplib.org>
+
+ * longlong.h (s390): Put back an accidentally deleted #else.
+
+ * configure.in (s390): Unset extra_functions for s390x.
+
+2011-10-12 Torbjorn Granlund <tege at gmplib.org>
+
+ * longlong.h (s390 umul_ppmm): With new-enough gcc, avoid asm.
+
+ From Andreas Krebbel:
+ * longlong.h (s390 umul_ppmm): Support 32-bit limbs with gcc using
+ 64-bit registers.
+ (s390 udiv_qrnnd): Likewise.
+
+2011-10-11 Torbjorn Granlund <tege at gmplib.org>
+
+ * configure.in (s390x): Pass -mzarch to gcc in 32-bit mode.
+
+ * longlong.h (s390x): Add __CLOBBER_CC for relevant asm patterns.
+
2011-10-10 Torbjorn Granlund <tege at gmplib.org>
From Marco Trudel:
* tests/mpz/t-scan.c (check_ref): Fix loop end bound.
+2011-10-09 Torbjorn Granlund <tege at gmplib.org>
+
+ * longlong.h (s390x): Put back UDItype casts to make gcc reloading use
+ right more for constants.
+ (s390x count_leading_zeros): Disable until we support z10 specifically.
+ (s390x add_ssaaaa): Remove algsi/slgsi until we support z10.
+
+2011-10-07 Torbjorn Granlund <tege at gmplib.org>
+
+ * longlong.h (s390): Add 32-bit zarch umul_ppmm and udiv_qrnnd.
+ (s390): Overhaul 32-bit and 64-bit code.
+
2011-10-04 Torbjorn Granlund <tege at gmplib.org>
+ * mpn/Makefile.am (TARG_DIST): Add s390_32 and s390_64, remove s390.
+
* doc/gmp.texi (Custom Allocation): Rephrase a paragraph.
* demos/factorize.c: Run 25 Miller-Rabin tests.
* mpz/nextprime.c: Run 25 mpz_millerrabin tests (was 10).
+2011-10-03 Torbjorn Granlund <tege at gmplib.org>
+
+ * configure.in: Support s390x.
+
+ * longlong.h: Add spport for 64-bit s390x.
+
+ * mpn/s390_64: New directory.
+ * mpn/s390_32: Directory renamed from mpn/s390.
+
2011-09-26 Torbjorn Granlund <tege at gmplib.org>
* mpn/sh/sh2/submul_1.s: Make this old submul_1 implementation
diff -r 743acaeab0bc -r 0f3da428d970 acinclude.m4
--- a/acinclude.m4 Tue Jan 24 19:29:16 2012 +0100
+++ b/acinclude.m4 Tue Jan 24 23:19:24 2012 +0100
@@ -43,6 +43,12 @@
define(POWERPC64_PATTERN,
[[powerpc64-*-* | powerpc64le-*-* | powerpc620-*-* | powerpc630-*-* | powerpc970-*-* | power[3-9]-*-*]])
+define(S390_PATTERN,
+[[s390-*-* | z900esa-*-* | z990esa-*-* | z9esa-*-* | z10esa-*-* | z196esa-*-*]])
+
+define(S390X_PATTERN,
+[[s390x-*-* | z900-*-* | z990-*-* | z9-*-* | z10-*-* | z196-*-*]])
+
define(X86_PATTERN,
[[i?86*-*-* | k[5-8]*-*-* | pentium*-*-* | athlon-*-* | viac3*-*-* | geode*-*-* | atom-*-*]])
diff -r 743acaeab0bc -r 0f3da428d970 configure.in
--- a/configure.in Tue Jan 24 19:29:16 2012 +0100
+++ b/configure.in Tue Jan 24 23:19:24 2012 +0100
@@ -288,7 +288,15 @@
#undef HAVE_HOST_CPU_pentiummmx
#undef HAVE_HOST_CPU_pentiumpro
#undef HAVE_HOST_CPU_pentium2
-#undef HAVE_HOST_CPU_pentium3])
+#undef HAVE_HOST_CPU_pentium3
+#undef HAVE_HOST_CPU_s390_z900
+#undef HAVE_HOST_CPU_s390_z990
+#undef HAVE_HOST_CPU_s390_z9
+#undef HAVE_HOST_CPU_s390_z10
+#undef HAVE_HOST_CPU_s390_z196
+
+/* Define to 1 iff we have a s390 with 64-bit registers. */
+#undef HAVE_HOST_CPU_s390_zarch])
# Table of compilers, options, and mpn paths. This code has various related
@@ -1090,11 +1098,75 @@
;;
- # IBM s/370 and similar
- [s3[6-9]0*-*-*])
+ # IBM System/390 and z/Architecture
+ S390_PATTERN | S390X_PATTERN)
+ abilist="32"
gcc_cflags="$gcc_cflags $fomit_frame_pointer"
- path="s390"
+ gcc_cflags_optlist="arch"
+ path="s390_32"
extra_functions="udiv_w_sdiv"
+ gcc_32_cflags_maybe="-m31"
+
+ case $host_cpu in
+ s390)
+ ;;
+ z900 | z900esa)
+ cpu="z900"
+ gccarch="$cpu"
+ path="s390_32/esame/$cpu s390_32/esame s390_32"
+ gcc_cflags_arch="-march=$gccarch"
+ AC_DEFINE_UNQUOTED(HAVE_HOST_CPU_s390_$cpu)
+ AC_DEFINE(HAVE_HOST_CPU_s390_zarch)
+ extra_functions=""
+ ;;
+ z990 | z990esa)
+ cpu="z990"
+ gccarch="$cpu"
+ path="s390_32/esame/$cpu s390_32/esame s390_32"
+ gcc_cflags_arch="-march=$gccarch"
+ AC_DEFINE_UNQUOTED(HAVE_HOST_CPU_s390_$cpu)
+ AC_DEFINE(HAVE_HOST_CPU_s390_zarch)
+ extra_functions=""
+ ;;
+ z9 | z9esa)
+ cpu="z9"
+ gccarch="z9-109"
+ path="s390_32/esame/$cpu s390_32/esame s390_32"
+ gcc_cflags_arch="-march=$gccarch"
+ AC_DEFINE_UNQUOTED(HAVE_HOST_CPU_s390_$cpu)
+ AC_DEFINE(HAVE_HOST_CPU_s390_zarch)
+ extra_functions=""
+ ;;
+ z10 | z10esa)
+ cpu="z10"
+ gccarch="z10"
+ path="s390_32/esame/$cpu s390_32/esame s390_32"
+ gcc_cflags_arch="-march=$gccarch"
+ AC_DEFINE_UNQUOTED(HAVE_HOST_CPU_s390_$cpu)
+ AC_DEFINE(HAVE_HOST_CPU_s390_zarch)
+ extra_functions=""
+ ;;
+ z196 | z196esa)
+ cpu="z196"
+ gccarch="z196"
+ path="s390_32/esame/$cpu s390_32/esame s390_32"
+ gcc_cflags_arch="-march=$gccarch"
+ AC_DEFINE_UNQUOTED(HAVE_HOST_CPU_s390_$cpu)
+ AC_DEFINE(HAVE_HOST_CPU_s390_zarch)
+ extra_functions=""
+ ;;
+ esac
+
+ case $host in
+ S390X_PATTERN)
+ abilist="64 32"
+ cclist_64="gcc"
+ gcc_64_cflags_optlist="arch"
+ gcc_64_cflags="$gcc_cflags -m64"
+ path_64="s390_64/$host_cpu s390_64"
+ extra_functions=""
+ ;;
+ esac
;;
diff -r 743acaeab0bc -r 0f3da428d970 longlong.h
--- a/longlong.h Tue Jan 24 19:29:16 2012 +0100
+++ b/longlong.h Tue Jan 24 23:19:24 2012 +0100
@@ -1,7 +1,7 @@
/* longlong.h -- definitions for mixed size 32/64 bit arithmetic.
Copyright 1991, 1992, 1993, 1994, 1996, 1997, 1999, 2000, 2001, 2002, 2003,
-2004, 2005, 2007, 2008, 2009 Free Software Foundation, Inc.
+2004, 2005, 2007, 2008, 2009, 2011 Free Software Foundation, Inc.
This file is free software; you can redistribute it and/or modify it under the
terms of the GNU Lesser General Public License as published by the Free
@@ -654,27 +654,172 @@
#endif /* hppa */
#if (defined (__i370__) || defined (__s390__) || defined (__mvs__)) && W_TYPE_SIZE == 32
-#define smul_ppmm(xh, xl, m0, m1) \
+#if defined (__zarch__) || defined (HAVE_HOST_CPU_s390_zarch)
+#define add_ssaaaa(sh, sl, ah, al, bh, bl) \
+ do { \
+/* if (__builtin_constant_p (bl)) \
+ __asm__ ("alfi\t%1,%o5\n\talcr\t%0,%3" \
+ : "=r" (sh), "=&r" (sl) \
+ : "0" (ah), "r" (bh), "%1" (al), "n" (bl) __CLOBBER_CC);\
+ else \
+*/ __asm__ ("alr\t%1,%5\n\talcr\t%0,%3" \
+ : "=r" (sh), "=&r" (sl) \
+ : "0" (ah), "r" (bh), "%1" (al), "r" (bl)__CLOBBER_CC); \
+ } while (0)
+#define sub_ddmmss(sh, sl, ah, al, bh, bl) \
+ do { \
+/* if (__builtin_constant_p (bl)) \
+ __asm__ ("slfi\t%1,%o5\n\tslbr\t%0,%3" \
+ : "=r" (sh), "=&r" (sl) \
+ : "0" (ah), "r" (bh), "1" (al), "n" (bl) __CLOBBER_CC); \
+ else \
+*/ __asm__ ("slr\t%1,%5\n\tslbr\t%0,%3" \
+ : "=r" (sh), "=&r" (sl) \
+ : "0" (ah), "r" (bh), "1" (al), "r" (bl) __CLOBBER_CC); \
+ } while (0)
+#if __GMP_GNUC_PREREQ (4,5)
+#define umul_ppmm(xh, xl, m0, m1) \
+ do { \
+ union {UDItype __ll; \
+ struct {USItype __h, __l;} __i; \
+ } __x; \
+ __x.__ll = (UDItype) (m0) * (UDItype) (m1); \
+ (xh) = __x.__i.__h; (xl) = __x.__i.__l; \
+ } while (0)
+#else
+#if 0
+/* FIXME: this fails if gcc knows about the 64-bit registers. Use only
+ with a new enough processor pretending we have 32-bit registers. */
+#define umul_ppmm(xh, xl, m0, m1) \
+ do { \
+ union {UDItype __ll; \
+ struct {USItype __h, __l;} __i; \
+ } __x; \
+ __asm__ ("mlr\t%0,%2" \
+ : "=r" (__x.__ll) \
+ : "%0" (m0), "r" (m1)); \
+ (xh) = __x.__i.__h; (xl) = __x.__i.__l; \
+ } while (0)
+#else
+#define umul_ppmm(xh, xl, m0, m1) \
+ do { \
+ /* When we have 64-bit regs and gcc is aware of that, we cannot simply use
+ DImode for the product, since that would be allocated to a single 64-bit
+ register, whereas mlr uses the low 32-bits of an even-odd register pair.
+ */ \
+ register USItype __r0 __asm__ ("0"); \
+ register USItype __r1 __asm__ ("1") = (m0); \
+ __asm__ ("mlr\t%0,%3" \
+ : "=r" (__r0), "=r" (__r1) \
+ : "r" (__r1), "r" (m1)); \
+ (xh) = __r0; (xl) = __r1; \
+ } while (0)
+#endif /* if 0 */
+#endif
+#if 0
+/* FIXME: this fails if gcc knows about the 64-bit registers. Use only
+ with a new enough processor pretending we have 32-bit registers. */
+#define udiv_qrnnd(q, r, n1, n0, d) \
+ do { \
+ union {UDItype __ll; \
+ struct {USItype __h, __l;} __i; \
+ } __x; \
+ __x.__i.__h = n1; __x.__i.__l = n0; \
+ __asm__ ("dlr\t%0,%2" \
+ : "=r" (__x.__ll) \
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