[Gmp-commit] /var/hg/gmp: Tweak loop control for a 6% speed increase.

mercurial at gmplib.org mercurial at gmplib.org
Mon Apr 23 03:28:43 CEST 2012


details:   /var/hg/gmp/rev/7829dde0ab4a
changeset: 14884:7829dde0ab4a
user:      Torbjorn Granlund <tege at gmplib.org>
date:      Mon Apr 23 03:28:38 2012 +0200
description:
Tweak loop control for a 6% speed increase.

diffstat:

 ChangeLog             |   4 ++++
 mpn/arm/aorsmul_1.asm |  10 +++++-----
 2 files changed, 9 insertions(+), 5 deletions(-)

diffs (48 lines):

diff -r fb2293f8cfd4 -r 7829dde0ab4a ChangeLog
--- a/ChangeLog	Mon Apr 23 01:22:50 2012 +0200
+++ b/ChangeLog	Mon Apr 23 03:28:38 2012 +0200
@@ -1,3 +1,7 @@
+2012-04-23  Torbjorn Granlund  <tege at gmplib.org>
+
+	* mpn/arm/aorsmul_1.asm: Tweak loop control for a 6% speed increase.
+
 2012-04-22  Torbjorn Granlund  <tege at gmplib.org>
 
 	* configure.in: Recognise ARM sub-architectures.
diff -r fb2293f8cfd4 -r 7829dde0ab4a mpn/arm/aorsmul_1.asm
--- a/mpn/arm/aorsmul_1.asm	Mon Apr 23 01:22:50 2012 +0200
+++ b/mpn/arm/aorsmul_1.asm	Mon Apr 23 03:28:38 2012 +0200
@@ -20,10 +20,10 @@
 include(`../config.m4')
 
 C	     cycles/limb
-C StrongARM:  7.75-9.75  (dependent on vl value)
+C StrongARM:     ?
 C XScale	 ?
 C Cortex-A8	 ?
-C Cortex-A9	 5.57
+C Cortex-A9	 5.25
 C Cortex-A15	 ?
 
 define(`rp', `r0')
@@ -78,7 +78,7 @@
 	ADDSUBC	r, rl, r5
 	str	r, [rp], #4
 L(skip2):
-	bics	r, n, #3
+	bics	n, n, #3
 	beq	L(rtn)
 
 	ldr	ul, [up], #4
@@ -110,9 +110,9 @@
 	ldr	rl, [rp, #4]
 	mov	r4, #0
 	umlal	r5, r4, ul, vl
+	sub	n, n, #4
+	tst	n, n
 	str	r, [rp], #4
-	sub	n, n, #4
-	bics	r, n, #3
 	bne	L(top)
 
 	ADDSUBC	r, rl, r5


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