[Gmp-commit] /var/hg/gmp: 3 new changesets

[mercurial at gmplib.org]

details:   /var/hg/gmp/rev/d78872b6ca6f
changeset: 14792:d78872b6ca6f
user:      Torbjorn Granlund <tege at gmplib.org>
date:      Wed Apr 04 14:15:29 2012 +0200
description:
Add a cycle number.

details:   /var/hg/gmp/rev/5bfea1249180
changeset: 14793:5bfea1249180
user:      Torbjorn Granlund <tege at gmplib.org>
date:      Wed Apr 04 14:18:57 2012 +0200
description:
Make room for DOS64 regparm shadow area.

details:   /var/hg/gmp/rev/d6cc05ca6948
changeset: 14794:d6cc05ca6948
user:      Torbjorn Granlund <tege at gmplib.org>
date:      Wed Apr 04 14:21:22 2012 +0200
description:
(ARM count_leading_zeros): Enable for more arch versions.

diffstat:

 ChangeLog                  |   7 +++++++
 longlong.h                 |  12 ++++++++++--
 mpn/sparc64/gcd_1.asm      |   2 +-
 mpn/x86_64/core2/gcd_1.asm |   7 +++++--
 mpn/x86_64/gcd_1.asm       |   9 ++++++---
 5 files changed, 29 insertions(+), 8 deletions(-)

diffs (119 lines):

diff -r 3a665a62eb2a -r d6cc05ca6948 ChangeLog
--- a/ChangeLog	Wed Apr 04 14:06:17 2012 +0200
+++ b/ChangeLog	Wed Apr 04 14:21:22 2012 +0200
@@ -1,3 +1,10 @@
+2012-04-04  Torbjorn Granlund  <tege at gmplib.org>
+
+	* longlong.h (ARM count_leading_zeros): Enable for more arch versions.
+
+	* mpn/x86_64/gcd_1.asm: Make room for DOS64 regparm shadow area.
+	* mpn/x86_64/core2/gcd_1.asm: Likewise.
+
 2012-04-03  Torbjorn Granlund  <tege at gmplib.org>
 
 	* mpn/x86_64/coreisbr/aorrlsh_n.asm: Make it actually work for DOS64.
diff -r 3a665a62eb2a -r d6cc05ca6948 longlong.h
--- a/longlong.h	Wed Apr 04 14:06:17 2012 +0200
+++ b/longlong.h	Wed Apr 04 14:21:22 2012 +0200
@@ -505,8 +505,16 @@
 #define UDIV_TIME 200
 #endif /* LONGLONG_STANDALONE */
 #endif
-#if defined (__ARM_ARCH_5__)
-/* This actually requires arm 5 */
+/* This is a bizarre test, but GCC doesn't define useful common symbol. */
+#if defined (__ARM_ARCH_5__)  || defined (__ARM_ARCH_5T__) || \
+    defined (__ARM_ARCH_5E__) || defined (__ARM_ARCH_5T__) || \
+    defined (__ARM_ARCH_6__)  || defined (__ARM_ARCH_6J__) || \
+    defined (__ARM_ARCH_6K__) || defined (__ARM_ARCH_6Z__) || \
+    defined (__ARM_ARCH_6ZK__)|| defined (__ARM_ARCH_6T2__)|| \
+    defined (__ARM_ARCH_6M__) || defined (__ARM_ARCH_7__)  || \
+    defined (__ARM_ARCH_7A__) || defined (__ARM_ARCH_7R__) || \
+    defined (__ARM_ARCH_7M__) || defined (__ARM_ARCH_7EM__)|| \
+    defined (__ARM_ARCH_7M__)
 #define count_leading_zeros(count, x) \
   __asm__ ("clz\t%0, %1" : "=r" (count) : "r" (x))
 #define COUNT_LEADING_ZEROS_0 32
diff -r 3a665a62eb2a -r d6cc05ca6948 mpn/sparc64/gcd_1.asm
--- a/mpn/sparc64/gcd_1.asm	Wed Apr 04 14:06:17 2012 +0200
+++ b/mpn/sparc64/gcd_1.asm	Wed Apr 04 14:21:22 2012 +0200
@@ -25,7 +25,7 @@
 
 
 C		  cycles/bit (approx)
-C UltraSPARC 1&2:      ?
+C UltraSPARC 1&2:      5.1
 C UltraSPARC 3:        5.0
 C UltraSPARC T1:      12.8
 C Numbers measured with: speed -CD -s32-64 -t32 mpn_gcd_1
diff -r 3a665a62eb2a -r d6cc05ca6948 mpn/x86_64/core2/gcd_1.asm
--- a/mpn/x86_64/core2/gcd_1.asm	Wed Apr 04 14:06:17 2012 +0200
+++ b/mpn/x86_64/core2/gcd_1.asm	Wed Apr 04 14:21:22 2012 +0200
@@ -53,6 +53,9 @@
 ABI_SUPPORT(DOS64)
 ABI_SUPPORT(STD64)
 
+IFDOS(`define(`STACK_ALLOC', 40)')
+IFSTD(`define(`STACK_ALLOC', 8)')
+
 C Undo some configure cleverness.
 C The problem is that C only defines the '1c' variant, and that configure
 C therefore considers modexact_1c to be the base function.  It then adds a
@@ -76,7 +79,7 @@
 
 	push	%rax		C preserve common twos over call
 	push	v0		C preserve v0 argument over call
-	sub	$8, %rsp	C maintain ABI required rsp alignment
+	sub	$STACK_ALLOC, %rsp	C maintain ABI required rsp alignment
 
 	cmp	$1, n
 	jnz	L(reduce_nby1)
@@ -104,7 +107,7 @@
 	CALL(	mpn_modexact_1_odd)
 L(reduced):
 
-	add	$8, %rsp
+	add	$STACK_ALLOC, %rsp
 	pop	%rdx
 
 	bsf	%rax, %rcx
diff -r 3a665a62eb2a -r d6cc05ca6948 mpn/x86_64/gcd_1.asm
--- a/mpn/x86_64/gcd_1.asm	Wed Apr 04 14:06:17 2012 +0200
+++ b/mpn/x86_64/gcd_1.asm	Wed Apr 04 14:21:22 2012 +0200
@@ -61,6 +61,9 @@
 ABI_SUPPORT(DOS64)
 ABI_SUPPORT(STD64)
 
+IFDOS(`define(`STACK_ALLOC', 40)')
+IFSTD(`define(`STACK_ALLOC', 8)')
+
 ASM_START()
 	TEXT
 	ALIGN(16)
@@ -93,7 +96,7 @@
 	cmp	%r8, v0
 	ja	L(noreduce)
 	push	v0
-	sub	$8, %rsp		C maintain ABI required rsp alignment
+	sub	$STACK_ALLOC, %rsp	C maintain ABI required rsp alignment
 
 L(bmod):
 IFDOS(`	mov	%rdx, %r8	')
@@ -102,7 +105,7 @@
 	CALL(	mpn_modexact_1_odd)
 
 L(reduced):
-	add	$8, %rsp
+	add	$STACK_ALLOC, %rsp
 	pop	%rdx
 
 L(noreduce):
@@ -114,7 +117,7 @@
 
 L(reduce_nby1):
 	push	v0
-	sub	$8, %rsp		C maintain ABI required rsp alignment
+	sub	$STACK_ALLOC, %rsp	C maintain ABI required rsp alignment
 
 	cmp	$BMOD_1_TO_MOD_1_THRESHOLD, n
 	jl	L(bmod)