[Gmp-commit] /var/hg/gmp: 5 new changesets

mercurial at gmplib.org mercurial at gmplib.org
Thu Oct 27 15:48:50 CEST 2011


details:   /var/hg/gmp/rev/e14bf9a101a2
changeset: 14385:e14bf9a101a2
user:      Torbjorn Granlund <tege at gmplib.org>
date:      Thu Oct 27 15:41:57 2011 +0200
description:
Add s390_32 sqr_basecase, remove separate integrated sqr_diag_addlsh1.asm.

details:   /var/hg/gmp/rev/a6e7c37f9885
changeset: 14386:a6e7c37f9885
user:      Torbjorn Granlund <tege at gmplib.org>
date:      Thu Oct 27 15:42:12 2011 +0200
description:
Add s390_32/esame mul_basecase.

details:   /var/hg/gmp/rev/1314035734c9
changeset: 14387:1314035734c9
user:      Torbjorn Granlund <tege at gmplib.org>
date:      Thu Oct 27 15:43:03 2011 +0200
description:
Fix rp=up code.  Remove a leftover insn.

details:   /var/hg/gmp/rev/d2ab59bfaaa5
changeset: 14388:d2ab59bfaaa5
user:      Torbjorn Granlund <tege at gmplib.org>
date:      Thu Oct 27 15:45:37 2011 +0200
description:
New file.

details:   /var/hg/gmp/rev/cfe0a56e1f8c
changeset: 14389:cfe0a56e1f8c
user:      Torbjorn Granlund <tege at gmplib.org>
date:      Thu Oct 27 15:48:39 2011 +0200
description:
*** empty log message ***

diffstat:

 ChangeLog                              |   10 +
 mpn/s390_32/esame/mul_basecase.asm     |  119 +++++++++++++
 mpn/s390_32/esame/sqr_basecase.asm     |  202 +++++++++++++++++++++++
 mpn/s390_32/esame/sqr_diag_addlsh1.asm |   77 --------
 mpn/s390_32/logops_n.asm               |  284 +++++++++++++++++++++++++++++++++
 mpn/s390_64/logops_n.asm               |    7 +-
 6 files changed, 618 insertions(+), 81 deletions(-)

diffs (truncated from 746 to 300 lines):

diff -r 6c6fc952ae46 -r cfe0a56e1f8c ChangeLog
--- a/ChangeLog	Wed Oct 26 15:19:19 2011 +0200
+++ b/ChangeLog	Thu Oct 27 15:48:39 2011 +0200
@@ -1,3 +1,13 @@
+2011-10-27  Torbjorn Granlund  <tege at gmplib.org>
+
+	* mpn/s390_32/esame/mul_basecase.asm: New file.
+
+	* mpn/s390_32/esame/sqr_basecase.asm: New file.
+
+	* mpn/s390_32/logops_n.asm: New file.
+
+	* mpn/s390_64/logops_n.asm: Fix rp=up code.  Remove a leftover insn.
+
 2011-10-26  Niels Möller  <nisse at lysator.liu.se>
 
 	* gmp-impl.h (mpn_hgcd_reduce, mpn_hgcd_reduce_itch): Added
diff -r 6c6fc952ae46 -r cfe0a56e1f8c mpn/s390_32/esame/mul_basecase.asm
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/mpn/s390_32/esame/mul_basecase.asm	Thu Oct 27 15:48:39 2011 +0200
@@ -0,0 +1,119 @@
+dnl  S/390-32/esame mpn_mul_basecase.
+
+dnl  Copyright 2011 Free Software Foundation, Inc.
+
+dnl  This file is part of the GNU MP Library.
+
+dnl  The GNU MP Library is free software; you can redistribute it and/or modify
+dnl  it under the terms of the GNU Lesser General Public License as published
+dnl  by the Free Software Foundation; either version 3 of the License, or (at
+dnl  your option) any later version.
+
+dnl  The GNU MP Library is distributed in the hope that it will be useful, but
+dnl  WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+dnl  or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU Lesser General Public
+dnl  License for more details.
+
+dnl  You should have received a copy of the GNU Lesser General Public License
+dnl  along with the GNU MP Library.  If not, see http://www.gnu.org/licenses/.
+
+include(`../config.m4')
+
+C            cycles/limb
+C z900		 ?
+C z990		 ?
+C z9		 ?
+C z10		 ?
+C z196		 ?
+
+C TODO
+C  * Perhaps add special case for un <= 2.
+C  * Replace loops by faster code.  The mul_1 and addmul_1 loops could be sped
+C    up by about 10%.
+
+C INPUT PARAMETERS
+define(`rp',	`%r2')
+define(`up',	`%r3')
+define(`un',	`%r4')
+define(`vp',	`%r5')
+define(`vn',	`%r6')
+
+define(`zero',	`%r8')
+
+ASM_START()
+PROLOGUE(mpn_mul_basecase)
+	chi	un, 2
+	jhe	L(ge2)
+
+C un = vn = 1
+	l	%r1, 0(vp)
+	ml	%r0, 0(up)
+	st	%r1, 0(rp)
+	st	%r0, 4(rp)
+	br	%r14
+
+L(ge2):	C jne	L(gen)
+
+
+L(gen):
+C mul_1 =======================================================================
+
+	stm	%r6, %r12, 24(%r15)
+	lhi	zero, 0
+	ahi	un, -1
+
+	l	%r7, 0(vp)
+	l	%r11, 0(up)
+	lhi	%r12, 4			C init index register
+	mlr	%r10, %r7
+	lr	%r9, un
+	st	%r11, 0(rp)
+	cr	%r15, %r15		C clear carry flag
+
+L(tm):	l	%r1, 0(%r12,up)
+	mlr	%r0, %r7
+	alcr	%r1, %r10
+	lr	%r10, %r0		C copy high part to carry limb
+	st	%r1, 0(%r12,rp)
+	la	%r12, 4(%r12)
+	brct	%r9, L(tm)
+
+	alcr	%r0, zero
+	st	%r0, 0(%r12,rp)
+
+C addmul_1 loop ===============================================================
+
+	ahi	vn, -1
+	je	L(outer_end)
+L(outer_loop):
+
+	la	rp, 4(rp)		C rp += 1
+	la	vp, 4(vp)		C up += 1
+	l	%r7, 0(vp)
+	l	%r11, 0(up)
+	lhi	%r12, 4			C init index register
+	mlr	%r10, %r7
+	lr	%r9, un
+	al	%r11, 0(rp)
+	st	%r11, 0(rp)
+
+L(tam):	l	%r1, 0(%r12,up)
+	l	%r11, 0(%r12,rp)
+	mlr	%r0, %r7
+	alcr	%r1, %r11
+	alcr	%r0, zero
+	alr	%r1, %r10
+	lr	%r10, %r0
+	st	%r1, 0(%r12,rp)
+	la	%r12, 4(%r12)
+	brct	%r9, L(tam)
+
+	alcr	%r0, zero
+	st	%r0, 0(%r12,rp)
+
+	brct	vn, L(outer_loop)
+L(outer_end):
+
+	lm	%r6, %r12, 24(%r15)
+	br	%r14
+EPILOGUE()
diff -r 6c6fc952ae46 -r cfe0a56e1f8c mpn/s390_32/esame/sqr_basecase.asm
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/mpn/s390_32/esame/sqr_basecase.asm	Thu Oct 27 15:48:39 2011 +0200
@@ -0,0 +1,202 @@
+dnl  S/390-32 mpn_sqr_basecase.
+
+dnl  Copyright 2011 Free Software Foundation, Inc.
+
+dnl  This file is part of the GNU MP Library.
+
+dnl  The GNU MP Library is free software; you can redistribute it and/or modify
+dnl  it under the terms of the GNU Lesser General Public License as published
+dnl  by the Free Software Foundation; either version 3 of the License, or (at
+dnl  your option) any later version.
+
+dnl  The GNU MP Library is distributed in the hope that it will be useful, but
+dnl  WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+dnl  or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU Lesser General Public
+dnl  License for more details.
+
+dnl  You should have received a copy of the GNU Lesser General Public License
+dnl  along with the GNU MP Library.  If not, see http://www.gnu.org/licenses/.
+
+include(`../config.m4')
+
+C            cycles/limb
+C z900		 ?
+C z990		23
+C z9		 ?
+C z10		 ?
+C z196		 ?
+
+C TODO
+C  * Clean up.
+C  * Stop iterating addmul_1 loop at latest for n = 2, implement longer tail.
+C    This will ask for basecase handling of n = 3.
+C  * Update counters and pointers more straightforwardly, possibly lowering
+C    register usage.
+C  * Should we use this allocation-free style for more sqr_basecase asm
+C    implementations?  The only disadvantage is that it requires R != U.
+C  * Replace loops by faster code.  The mul_1 and addmul_1 loops could be sped
+C    up by about 10%.  The sqr_diag_addlsh1 loop could probably be sped up even
+C    more.
+
+C INPUT PARAMETERS
+define(`rp',	`%r2')
+define(`up',	`%r3')
+define(`n',	`%r4')
+
+define(`zero',	`%r8')
+define(`rp_saved',	`%r9')
+define(`up_saved',	`%r13')
+define(`n_saved',	`%r14')
+
+ASM_START()
+PROLOGUE(mpn_sqr_basecase)
+	ahi	n, -2
+	jhe	L(ge2)
+
+C n = 1
+	l	%r5, 0(up)
+	mlr	%r4, %r5
+	st	%r5, 0(rp)
+	st	%r4, 4(rp)
+	br	%r14
+
+L(ge2):	jne	L(gen)
+
+C n = 2
+	stm	%r6, %r8, 24(%r15)
+	lhi	zero, 0
+
+	l	%r5, 0(up)
+	mlr	%r4, %r5		C u0 * u0
+	l	%r1, 4(up)
+	mlr	%r0, %r1		C u1 * u1
+	st	%r5, 0(rp)
+
+	l	%r7, 0(up)
+	ml	%r6, 4(up)		C u0 * u1
+	alr	%r7, %r7
+	alcr	%r6, %r6
+	alcr	%r0, zero
+
+	alr	%r4, %r7
+	alcr	%r1, %r6
+	alcr	%r0, zero
+	st	%r4, 4(rp)
+	st	%r1, 8(rp)
+	st	%r0, 12(rp)
+
+	lm	%r6, %r8, 24(%r15)
+	br	%r14
+
+L(gen):
+C mul_1 =======================================================================
+
+	stm	%r6, %r14, 24(%r15)
+	lhi	zero, 0
+	lr	up_saved, up
+	lr	rp_saved, rp
+	lr	n_saved, n
+
+	l	%r6, 0(up)
+	l	%r11, 4(up)
+	lhi	%r12, 8		C init index register
+	mlr	%r10, %r6
+	lr	%r5, n
+	st	%r11, 4(rp)
+	cr	%r15, %r15		C clear carry flag
+
+L(tm):	l	%r1, 0(%r12,up)
+	mlr	%r0, %r6
+	alcr	%r1, %r10
+	lr	%r10, %r0		C copy high part to carry limb
+	st	%r1, 0(%r12,rp)
+	la	%r12, 4(%r12)
+	brct	%r5, L(tm)
+
+	alcr	%r0, zero
+	st	%r0, 0(%r12,rp)
+
+C addmul_1 loop ===============================================================
+
+	ahi	n, -1
+	je	L(outer_end)
+L(outer_loop):
+
+	la	rp, 8(rp)		C rp += 2
+	la	up, 4(up)		C up += 1
+	l	%r6, 0(up)
+	l	%r11, 4(up)
+	lhi	%r12, 8		C init index register
+	mlr	%r10, %r6
+	lr	%r5, n
+	al	%r11, 4(rp)
+	st	%r11, 4(rp)
+
+L(tam):	l	%r1, 0(%r12,up)
+	l	%r7, 0(%r12,rp)
+	mlr	%r0, %r6
+	alcr	%r1, %r7
+	alcr	%r0, zero
+	alr	%r1, %r10
+	lr	%r10, %r0
+	st	%r1, 0(%r12,rp)
+	la	%r12, 4(%r12)
+	brct	%r5, L(tam)
+
+	alcr	%r0, zero
+	st	%r0, 0(%r12,rp)
+
+	brct	n, L(outer_loop)
+L(outer_end):
+
+	l	%r6, 4(up)
+	l	%r1, 8(up)
+	lr	%r7, %r0		C Same as: l %r7, 12(,rp)
+	mlr	%r0, %r6
+	alr	%r1, %r7


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