[Gmp-commit] /var/hg/gmp: fix fat on x86_64
mercurial at gmplib.org
mercurial at gmplib.org
Thu May 5 21:03:01 CEST 2011
details: /var/hg/gmp/rev/93e8579e4b85
changeset: 14166:93e8579e4b85
user: Marc Glisse <marc.glisse at inria.fr>
date: Thu May 05 21:02:58 2011 +0200
description:
fix fat on x86_64
diffstat:
ChangeLog | 5 +++++
config.guess | 4 ++++
mpn/x86_64/fat/fat.c | 13 ++++++++++---
3 files changed, 19 insertions(+), 3 deletions(-)
diffs (61 lines):
diff -r 54a67a61f764 -r 93e8579e4b85 ChangeLog
--- a/ChangeLog Thu May 05 17:16:13 2011 +0200
+++ b/ChangeLog Thu May 05 21:02:58 2011 +0200
@@ -1,3 +1,8 @@
+2011-05-05 Marc Glisse <marc.glisse at inria.fr>
+
+ * mpn/x86_64/fat/fat.c: Update for Sandy Bridge.
+ * config.guess: warning to keep it in sync with fat.c.
+
2011-05-05 Torbjorn Granlund <tege at gmplib.org>
* mpn/x86_64/fat/fat_entry.asm (PIC_OR_DARWIN): New symbol. Use it to
diff -r 54a67a61f764 -r 93e8579e4b85 config.guess
--- a/config.guess Thu May 05 17:16:13 2011 +0200
+++ b/config.guess Thu May 05 21:02:58 2011 +0200
@@ -740,6 +740,10 @@
stepping = fms & 0xf;
modelstr = "$guess_cpu";
+
+ /**************************************************/
+ /*** WARNING: keep this list in sync with fat.c ***/
+ /**************************************************/
if (strcmp (vendor_string, "GenuineIntel") == 0)
{
switch (family)
diff -r 54a67a61f764 -r 93e8579e4b85 mpn/x86_64/fat/fat.c
--- a/mpn/x86_64/fat/fat.c Thu May 05 17:16:13 2011 +0200
+++ b/mpn/x86_64/fat/fat.c Thu May 05 21:02:58 2011 +0200
@@ -107,6 +107,9 @@
family = ((fms >> 8) & 0xf) + ((fms >> 20) & 0xff);
model = ((fms >> 4) & 0xf) + ((fms >> 12) & 0xf0);
+ /*********************************************************/
+ /*** WARNING: keep this list in sync with config.guess ***/
+ /*********************************************************/
if (strcmp (vendor_string, "GenuineIntel") == 0)
{
switch (family)
@@ -168,14 +171,18 @@
case 0x25: /* WSM Clarkdale/Arrandale */
case 0x28:
case 0x29:
- case 0x2a: /* SB */
case 0x2b:
case 0x2c: /* WSM Gulftown */
- case 0x2d: /* SBC-EP */
case 0x2e: /* NHM Beckton */
case 0x2f: /* WSM Eagleton */
CPUVEC_SETUP_core2;
- CPUVEC_SETUP_corei;
+ CPUVEC_SETUP_coreinhm;
+ break;
+
+ case 0x2a: /* SB */
+ case 0x2d: /* SBC-EP */
+ CPUVEC_SETUP_core2;
+ CPUVEC_SETUP_coreisbr;
break;
}
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