[Gmp-commit] /home/hgfiles/gmp-5.0: Don't rely on ZF after 'bt' insn.
mercurial at gmplib.org
mercurial at gmplib.org
Thu Nov 11 14:11:21 CET 2010
details: /home/hgfiles/gmp-5.0/rev/a3091e12fad7
changeset: 13436:a3091e12fad7
user: Torbjorn Granlund <tege at gmplib.org>
date: Thu Nov 11 14:11:09 2010 +0100
description:
Don't rely on ZF after 'bt' insn.
diffstat:
ChangeLog | 5 +++++
mpn/x86_64/atom/aors_n.asm | 23 +++++++++++++----------
2 files changed, 18 insertions(+), 10 deletions(-)
diffs (77 lines):
diff -r d38bf82a975e -r a3091e12fad7 ChangeLog
--- a/ChangeLog Sat Nov 06 19:36:19 2010 +0100
+++ b/ChangeLog Thu Nov 11 14:11:09 2010 +0100
@@ -1,3 +1,8 @@
+2010-11-11 Torbjorn Granlund <tege at gmplib.org>
+
+ * mpn/x86_64/atom/aors_n.asm: Don't rely on ZF after 'bt' insn.
+ Use 64-bit 'test' to support operands of 2^32 limbs and more.
+
2010-11-06 Torbjorn Granlund <tege at gmplib.org>
* mpn/x86_64/aors_n.asm: Rewrite not to rely on ZF after 'bt' insn.
diff -r d38bf82a975e -r a3091e12fad7 mpn/x86_64/atom/aors_n.asm
--- a/mpn/x86_64/atom/aors_n.asm Sat Nov 06 19:36:19 2010 +0100
+++ b/mpn/x86_64/atom/aors_n.asm Thu Nov 11 14:11:09 2010 +0100
@@ -1,6 +1,6 @@
dnl X86-64 mpn_add_n, mpn_sub_n, optimized for Intel Atom.
-dnl Copyright 2003, 2004, 2005, 2007, 2008 Free Software Foundation, Inc.
+dnl Copyright 2003, 2004, 2005, 2007, 2008, 2010 Free Software Foundation, Inc.
dnl This file is part of the GNU MP Library.
@@ -63,15 +63,16 @@
jg L(b3)
L(b1): mov (%rsi), %r10
- test R32(%rcx), R32(%rcx)
- bt $0, R32(%r8)
+ test %rcx, %rcx
jnz L(gt1)
+ shr R32(%r8) C Set CF from argument
ADCSBB (%rdx), %r10
mov %r10, (%rdi)
mov R32(%rcx), R32(%rax) C zero rax
adc R32(%rax), R32(%rax)
ret
-L(gt1): ADCSBB (%rdx), %r10
+L(gt1): shr R32(%r8)
+ ADCSBB (%rdx), %r10
mov 8(%rsi), %r11
lea 16(%rsi), %rsi
lea -16(%rdx), %rdx
@@ -81,12 +82,13 @@
L(b2): mov (%rsi), %r9
mov 8(%rsi), %r10
lea -8(%rdx), %rdx
- test R32(%rcx), R32(%rcx)
- bt $0, R32(%r8)
+ test %rcx, %rcx
jnz L(gt2)
+ shr R32(%r8)
lea -40(%rdi), %rdi
jmp L(e2)
-L(gt2): ADCSBB 8(%rdx), %r9
+L(gt2): shr R32(%r8)
+ ADCSBB 8(%rdx), %r9
mov 16(%rsi), %r11
lea -8(%rsi), %rsi
lea -8(%rdi), %rdi
@@ -95,12 +97,13 @@
L(b3): mov (%rsi), %rax
mov 8(%rsi), %r9
mov 16(%rsi), %r10
- test R32(%rcx), R32(%rcx)
- bt $0, %r8
+ test %rcx, %rcx
jnz L(gt3)
+ shr R32(%r8)
lea -32(%rdi), %rdi
jmp L(e3)
-L(gt3): ADCSBB (%rdx), %rax
+L(gt3): shr R32(%r8)
+ ADCSBB (%rdx), %rax
jmp L(m3)
L(b0): mov (%rsi), %r11
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