Likely GMP bug

Vincent Lefevre vincent at
Fri Jun 15 09:24:00 UTC 2018

On 2018-06-15 10:56:05 +0200, Torbjorn Granlund wrote:
> nisse at (Niels Möller) writes:
>   10% speedup.
> A great speedup for an important functions.
> (It will be a slowdown for one obsolete platform, 64-bit Pentium 4.
> There, a 64-bit right shift has a latency 7 or 8 cycles depending on
> where the count is located.  I will not lose sleep over this, in
> particular as it will typically use asm.)

But shouldn't it be the goal of the compiler to generate the fastest
code for the target?

Vincent Lefèvre <vincent at> - Web: <>
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Work: CR INRIA - computer arithmetic / AriC project (LIP, ENS-Lyon)

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