Mulx: Illegal Instruction

[Torbjörn Granlund]

Paul Peet <peetpaul69 at gmail.com> writes:

  Distro: Arch Linux (x86_64)
  CPU: Intel Pentium G4400 (Skylake)
  Kernel: Linux Kernel 4.2.5-1-ARCH
  GMP-Version: 6.1.0
  GCC: 5.2.0
  
  I discovered this bug while trying to compiling the linux kernel but
  it ultimately failed.
  The issue which occured was an SIGILL one. I traced down the issue
  back to the assembly code and the result was that
  it was executing a mulx instruction which apparently is invalid here
  on my cpu (Pentium G4400).
  A member suggested that it might be an issue with the detection logic in gmp.
  
  For more detailed overview of the issue:
  https://bbs.archlinux.org/viewtopic.php?id=205703
  
  Disassembly of the illegal instruction:
  Dump of assembler code for function __gmpn_sqr_basecase_coreibwl:
     0x00007ffff7708000 <+0>: cmp    $0x2,%rdx
     0x00007ffff7708004 <+4>: jae    0x7ffff7708016
  <__gmpn_sqr_basecase_coreibwl+22>
     0x00007ffff7708006 <+6>: mov    (%rsi),%rdx
  => 0x00007ffff7708009 <+9>: mulx   %rdx,%rax,%rdx

I would expect skylake to come with MULX (which were introduced with
haswell) as well as ADX (which were introduced with broadwell)..

Perhaps Intel fused them out in an attempt to make a low-end product
less attractive.  I'll ask.

We encountered a similar situation with AVX challenged haswells.

It will be too much work for us to support a matrix of
(microarchitectures x fused instructions).  We will handle this new
world by dropping back to an older microarchitecture where the fused
instruction exists.  E.g., a skylake without MULX will be treated as an
ivybridge.


-- 
Torbjörn
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