[arm64] Negative immediates

[Torbjörn Granlund]

Marc Glisse <marc.glisse at inria.fr> writes:

  On Sun, 21 Sep 2014, Marc Glisse wrote:
  
  > So I guess we should not rely on it. Is this just meant to be:
  > 	sub	x1, x1, #8
  > ?
  
  This obvious change (in a dozen places in lshift/rshift) lets the
  build complete, and the testsuite passes, so I'll commit it later if
  nobody complains.
  
Let's hope nobody does that then.  :-)

  The compilation is quite noisy with -Wasm-operand-widths. In
  particular, it complains about calling count_leading_zeros(a,b) where
  a has 32 bits. The compiler is right in that the clz instruction wants
  2 registers of the same size, though I doubt it can cause any trouble.

I suppose that we might want to have the asm use a 64-bit destination
reg then.

  I am also seeing it with umul_ppmm (digit, frac, frac, 10) because of
  the last argument.

OK.

  By the way, inline asm on aarch64 confuses me, it seems important to
  name the registers properly (w0 vs x0) but I only see the "r"
  constraint and clang does not seem to use the type of the argument to
  disambiguate between w and x.

The type width of the expression will be used, just like for x86-64
where registers are named differently for different operation widths.

But there are typically modifier flags which asm can use.  I believe we
make use of such flags for some CPUs.  Admittedly, this is somewhat
unclean, as it relies on gcc internals.

An alternative is to have explicit casts for source asm arguments.


-- 
Torbjörn
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