GMP 6.0 miscompiles for arm-unknown-linux-gnueabihf

[Torbjorn Granlund]

"Steve M. Robbins" <steve at sumost.ca> writes:

  libtool: compile:  arm-linux-gnueabihf-gcc -std=gnu99 -DHAVE_CONFIG_H -I. -
  I../../mpn -I.. -D__GMP_WITHIN_GMP -I../.. -DOPERATION_div_qr_1n_pi1 -
  D_FORTIFY_SOURCE=2 -g -O2 -fstack-protector --param=ssp-buffer-size=4 -Wformat 
  -Werror=format-security -O3 -c div_qr_1n_pi1.c  -fPIC -DPIC -o 
  .libs/div_qr_1n_pi1.o
  /tmp/cchR2I5u.s: Assembler messages:
  /tmp/cchR2I5u.s:178: Error: thumb conditional instruction should be in IT 
  block -- `movcc r4,#0'
  /tmp/cchR2I5u.s:179: Error: thumb conditional instruction should be in IT 
  block -- `movcs r4,#-1'
  /tmp/cchR2I5u.s:419: Error: thumb conditional instruction should be in IT 
  block -- `movcc r4,#0'
  /tmp/cchR2I5u.s:420: Error: thumb conditional instruction should be in IT 
  block -- `movcs r4,#-1'
  make[3]: *** [div_qr_1n_pi1.lo] Error 1
  
These come from inline asm in the mpn/generic/div_qr_1n_pi1.c.

This is a new bug, in probably in the assembler which mistakes plain old
ARM instructions for Thumb instructions, but possibly the compiler
passes some silly options to misdirect the assembler.

What does that cempiler make of

int slt(int      a,      int b) { return a < b; }
int ult(unsigned a, unsigned b) { return a < b; }

if compiled with all your wondrous extra options, plus -S?
I suspect there will be some conditional mov instructions in there.

I get:

slt:	cmp	r0, r1
	movge	r0, #0
	movlt	r0, #1
	bx	lr

ult:	cmp	r0, r1
	movcs	r0, #0
	movcc	r0, #1
	bx	lr


Torbjörn
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