mpn_rshift / mpn_lshift bug on m68000

[Patrick Pelissier]

Kevin Ryde wrote:
> This is almost certainly an aspect of the system, not the cpu.
> Thanks, I see -mshort breaks the calling conventions.
> That option is going to be unusable on any svr4 style system.  I
> wonder what it's for.  68000 embedded system cross compiles or
> something I guess.
 > If you have a system that you're using which has or wants those
 > variant conventions then we can accomodate it, otherwise I'm going to
 > add the words below to the manual.

  It seems you haven't understand I am talking about a real 68000.
The first one of the familly of the 68k! The one which came out in 1979.
  On all systems based on a 68000 (a real 68000, not a 68030, a 68040 or 
a 68060), the convention is int=short, and the stack is 16 bits aligned. 
I have talked about using -mshort on a 68040 to produce the same code 
that it is produced by a compiler which produced code for 68000 only.
  The 68000 is a 16 bits cpu. The 68040 is a 32 bits cpu.
  The bug is on system based on 68000, not on system based on 68040 
which used -mshort option (even if it could be good to deal with it.).
  I am currently porting GMP to such a system. It is the ti-68k 
calculator (Ti-89, Ti-92+ and V200) using gcc, which use a 68000 cpu, 
not a 32bits mc68k cpu. In fact, it is because MPFR needs some testing 
on 16-bits system.
  Anyway, you can add some testing in the configure to detect the int size.

  By the way, pushing a 16-bits values, without keeping the stack 
longword aligned is slower than keeping the stack word aligned:
  moveb d0,-(a7)  ; Decrease stack by 2
  movew d0,-(a7)  ; Decrease stack by 2
  movel d0,-(a7)  ; Decrease stack by 4
This is an extract of M68000PRM.pdf (Mc68k Familly Programmers Reference 
Manual):

  2.2.5 Address Register Indirect with Predecrement Mode:
  [...] If the address register is the stack register and the operand 
size is byte, the address is decremented by two to keep the stack 
pointer aligned to a word boundary.
  [...]
  2.6 Other Data Structures
  2.6.1 System Stack
  [...] To keep data on the system stack aligned for maximum 
efficuiency, the active stack ptr is automatically decremented or 
incremented by two for all byte-size operands moved to or from the 
stack. In long-word-organised memory, aligning the stack pointer on a 
long-word address signicantly increases the efficiency of stacking 
exception frames, subroutines calls and returns, and other stacking 
operations.

  That is to say, the system must do by itself the longword alignement.
But for systems which don't have a long-word-organised memory, just like 
all systems based on 68000 cpu (the first one), it is just a waste of 
time to keep the stack longword aligned!
  I hope you have understand the problem.

> (Incidentally, if you're using 68k of whatever flavour we're always on
> the lookout for good, complete, well-tested assembler code
> optimizations.  Those chips will always run slow, but perhaps can be
> made less slow than they were before.  :-)
  Why not?

  Sincerely,
   Patrick Pelissier