For more information on all CORE-V built-ins, please see https://github.com/openhwgroup/core-v-sw/blob/master/specifications/corev-builtin-spec.md
These built-in functions are available for the CORE-V MAC machine architecture. For more information on CORE-V built-ins, please see https://github.com/openhwgroup/core-v-sw/blob/master/specifications/corev-builtin-spec.md#listing-of-multiply-accumulate-builtins-xcvmac.
int32_t __builtin_riscv_cv_mac_mac (int32_t, int32_t, int32_t) ¶Generated assembler cv.mac
int32_t __builtin_riscv_cv_mac_msu (int32_t, int32_t, int32_t) ¶Generates the cv.msu machine instruction.
uint32_t __builtin_riscv_cv_mac_muluN (uint32_t, uint32_t, uint8_t) ¶Generates the cv.muluN machine instruction.
uint32_t __builtin_riscv_cv_mac_mulhhuN (uint32_t, uint32_t, uint8_t) ¶Generates the cv.mulhhuN machine instruction.
int32_t __builtin_riscv_cv_mac_mulsN (int32_t, int32_t, uint8_t) ¶Generates the cv.mulsN machine instruction.
int32_t __builtin_riscv_cv_mac_mulhhsN (int32_t, int32_t, uint8_t) ¶Generates the cv.mulhhsN machine instruction.
uint32_t __builtin_riscv_cv_mac_muluRN (uint32_t, uint32_t, uint8_t) ¶Generates the cv.muluRN machine instruction.
uint32_t __builtin_riscv_cv_mac_mulhhuRN (uint32_t, uint32_t, uint8_t) ¶Generates the cv.mulhhuRN machine instruction.
int32_t __builtin_riscv_cv_mac_mulsRN (int32_t, int32_t, uint8_t) ¶Generates the cv.mulsRN machine instruction.
int32_t __builtin_riscv_cv_mac_mulhhsRN (int32_t, int32_t, uint8_t) ¶Generates the cv.mulhhsRN machine instruction.
uint32_t __builtin_riscv_cv_mac_macuN (uint32_t, uint32_t, uint8_t) ¶Generates the cv.macuN machine instruction.
uint32_t __builtin_riscv_cv_mac_machhuN (uint32_t, uint32_t, uint8_t) ¶Generates the cv.machhuN machine instruction.
int32_t __builtin_riscv_cv_mac_macsN (int32_t, int32_t, uint8_t) ¶Generates the cv.macsN machine instruction.
int32_t __builtin_riscv_cv_mac_machhsN (int32_t, int32_t, uint8_t) ¶Generates the cv.machhsN machine instruction.
uint32_t __builtin_riscv_cv_mac_macuRN (uint32_t, uint32_t, uint8_t) ¶Generates the cv.macuRN machine instruction.
uint32_t __builtin_riscv_cv_mac_machhuRN (uint32_t, uint32_t, uint8_t) ¶Generates the cv.machhuRN machine instruction.
int32_t __builtin_riscv_cv_mac_macsRN (int32_t, int32_t, uint8_t) ¶Generates the cv.macsRN machine instruction.
int32_t __builtin_riscv_cv_mac_machhsRN (int32_t, int32_t, uint8_t) ¶Generates the cv.machhsRN machine instruction.
These built-in functions are available for the CORE-V ALU machine architecture. For more information on CORE-V built-ins, please see https://github.com/openhwgroup/core-v-sw/blob/master/specifications/corev-builtin-spec.md#listing-of-miscellaneous-alu-builtins-xcvalu
int __builtin_riscv_cv_alu_slet (int32_t, int32_t) ¶Generated assembler cv.slet
int __builtin_riscv_cv_alu_sletu (uint32_t, uint32_t) ¶Generated assembler cv.sletu
int32_t __builtin_riscv_cv_alu_min (int32_t, int32_t) ¶Generated assembler cv.min
uint32_t __builtin_riscv_cv_alu_minu (uint32_t, uint32_t) ¶Generated assembler cv.minu
int32_t __builtin_riscv_cv_alu_max (int32_t, int32_t) ¶Generated assembler cv.max
uint32_tnt __builtin_riscv_cv_alu_maxu (uint32_t, uint32_t) ¶Generated assembler cv.maxu
int32_t __builtin_riscv_cv_alu_exths (int16_t) ¶Generated assembler cv.exths
uint32_t __builtin_riscv_cv_alu_exthz (uint16_t) ¶Generated assembler cv.exthz
int32_t __builtin_riscv_cv_alu_extbs (int8_t) ¶Generated assembler cv.extbs
uint32_t __builtin_riscv_cv_alu_extbz (uint8_t) ¶Generated assembler cv.extbz
int32_t __builtin_riscv_cv_alu_clip (int32_t, uint32_t) ¶Generated assembler cv.clip if the uint32_t operand is a constant and an exact power of 2.
Generated assembler cv.clipr if the it is a register.
uint32_t __builtin_riscv_cv_alu_clipu (uint32_t, uint32_t) ¶Generated assembler cv.clipu if the uint32_t operand is a constant and an exact power of 2.
Generated assembler cv.clipur if the it is a register.
int32_t __builtin_riscv_cv_alu_addN (int32_t, int32_t, uint8_t) ¶Generated assembler cv.addN if the uint8_t operand is a constant and in the range 0 <= shft <= 31.
Generated assembler cv.addNr if the it is a register.
uint32_t __builtin_riscv_cv_alu_adduN (uint32_t, uint32_t, uint8_t) ¶Generated assembler cv.adduN if the uint8_t operand is a constant and in the range 0 <= shft <= 31.
Generated assembler cv.adduNr if the it is a register.
int32_t __builtin_riscv_cv_alu_addRN (int32_t, int32_t, uint8_t) ¶Generated assembler cv.addRN if the uint8_t operand is a constant and in the range 0 <= shft <= 31.
Generated assembler cv.addRNr if the it is a register.
uint32_t __builtin_riscv_cv_alu_adduRN (uint32_t, uint32_t, uint8_t) ¶Generated assembler cv.adduRN if the uint8_t operand is a constant and in the range 0 <= shft <= 31.
Generated assembler cv.adduRNr if the it is a register.
int32_t __builtin_riscv_cv_alu_subN (int32_t, int32_t, uint8_t) ¶Generated assembler cv.subN if the uint8_t operand is a constant and in the range 0 <= shft <= 31.
Generated assembler cv.subNr if the it is a register.
uint32_t __builtin_riscv_cv_alu_subuN (uint32_t, uint32_t, uint8_t) ¶Generated assembler cv.subuN if the uint8_t operand is a constant and in the range 0 <= shft <= 31.
Generated assembler cv.subuNr if the it is a register.
int32_t __builtin_riscv_cv_alu_subRN (int32_t, int32_t, uint8_t) ¶Generated assembler cv.subRN if the uint8_t operand is a constant and in the range 0 <= shft <= 31.
Generated assembler cv.subRNr if the it is a register.
uint32_t __builtin_riscv_cv_alu_subuRN (uint32_t, uint32_t, uint8_t) ¶Generated assembler cv.subuRN if the uint8_t operand is a constant and in the range 0 <= shft <= 31.
Generated assembler cv.subuRNr if the it is a register.
These built-in functions are available for the CORE-V Event Load machine architecture. For more information on CORE-V ELW builtins, please see https://github.com/openhwgroup/core-v-sw/blob/master/specifications/corev-builtin-spec.md#listing-of-event-load-word-builtins-xcvelw
uint32_t __builtin_riscv_cv_elw_elw (uint32_t *) ¶Generated assembler cv.elw
These built-in functions are available for the CORE-V SIMD machine architecture. For more information on CORE-V SIMD built-ins, please see https://github.com/openhwgroup/core-v-sw/blob/master/specifications/corev-builtin-spec.md#listing-of-pulp-816-bit-simd-builtins-xcvsimd
uint32_t __builtin_riscv_cv_simd_add_h (uint32_t, uint32_t, uint4_t) ¶Generated assembler cv.add.h
uint32_t __builtin_riscv_cv_simd_add_b (uint32_t, uint32_t) ¶Generated assembler cv.add.b
uint32_t __builtin_riscv_cv_simd_add_sc_h (uint32_t, int16_t) ¶Generated assembler cv.add.sc.h
uint32_t __builtin_riscv_cv_simd_add_sc_h (uint32_t, int6_t) ¶Generated assembler cv.add.sci.h
uint32_t __builtin_riscv_cv_simd_add_sc_b (uint32_t, int8_t) ¶Generated assembler cv.add.sc.b
uint32_t __builtin_riscv_cv_simd_add_sc_b (uint32_t, int6_t) ¶Generated assembler cv.add.sci.b
uint32_t __builtin_riscv_cv_simd_sub_h (uint32_t, uint32_t, uint4_t) ¶Generated assembler cv.sub.h
uint32_t __builtin_riscv_cv_simd_sub_b (uint32_t, uint32_t) ¶Generated assembler cv.sub.b
uint32_t __builtin_riscv_cv_simd_sub_sc_h (uint32_t, int16_t) ¶Generated assembler cv.sub.sc.h
uint32_t __builtin_riscv_cv_simd_sub_sc_h (uint32_t, int6_t) ¶Generated assembler cv.sub.sci.h
uint32_t __builtin_riscv_cv_simd_sub_sc_b (uint32_t, int8_t) ¶Generated assembler cv.sub.sc.b
uint32_t __builtin_riscv_cv_simd_sub_sc_b (uint32_t, int6_t) ¶Generated assembler cv.sub.sci.b
uint32_t __builtin_riscv_cv_simd_avg_h (uint32_t, uint32_t) ¶Generated assembler cv.avg.h
uint32_t __builtin_riscv_cv_simd_avg_b (uint32_t, uint32_t) ¶Generated assembler cv.avg.b
uint32_t __builtin_riscv_cv_simd_avg_sc_h (uint32_t, int16_t) ¶Generated assembler cv.avg.sc.h
uint32_t __builtin_riscv_cv_simd_avg_sc_h (uint32_t, int6_t) ¶Generated assembler cv.avg.sci.h
uint32_t __builtin_riscv_cv_simd_avg_sc_b (uint32_t, int8_t) ¶Generated assembler cv.avg.sc.b
uint32_t __builtin_riscv_cv_simd_avg_sc_b (uint32_t, int6_t) ¶Generated assembler cv.avg.sci.b
uint32_t __builtin_riscv_cv_simd_avgu_h (uint32_t, uint32_t) ¶Generated assembler cv.avgu.h
uint32_t __builtin_riscv_cv_simd_avgu_b (uint32_t, uint32_t) ¶Generated assembler cv.avgu.b
uint32_t __builtin_riscv_cv_simd_avgu_sc_h (uint32_t, uint16_t) ¶Generated assembler cv.avgu.sc.h
uint32_t __builtin_riscv_cv_simd_avgu_sc_h (uint32_t, uint6_t) ¶Generated assembler cv.avgu.sci.h
uint32_t __builtin_riscv_cv_simd_avgu_sc_b (uint32_t, uint8_t) ¶Generated assembler cv.avgu.sc.b
uint32_t __builtin_riscv_cv_simd_avgu_sc_b (uint32_t, uint6_t) ¶Generated assembler cv.avgu.sci.b
uint32_t __builtin_riscv_cv_simd_min_h (uint32_t, uint32_t) ¶Generated assembler cv.min.h
uint32_t __builtin_riscv_cv_simd_min_b (uint32_t, uint32_t) ¶Generated assembler cv.min.b
uint32_t __builtin_riscv_cv_simd_min_sc_h (uint32_t, int16_t) ¶Generated assembler cv.min.sc.h
uint32_t __builtin_riscv_cv_simd_min_sc_h (uint32_t, int6_t) ¶Generated assembler cv.min.sci.h
uint32_t __builtin_riscv_cv_simd_min_sc_b (uint32_t, int8_t) ¶Generated assembler cv.min.sc.b
uint32_t __builtin_riscv_cv_simd_min_sc_b (uint32_t, int6_t) ¶Generated assembler cv.min.sci.b
uint32_t __builtin_riscv_cv_simd_minu_h (uint32_t, uint32_t) ¶Generated assembler cv.minu.h
uint32_t __builtin_riscv_cv_simd_minu_b (uint32_t, uint32_t) ¶Generated assembler cv.minu.b
uint32_t __builtin_riscv_cv_simd_minu_sc_h (uint32_t, uint16_t) ¶Generated assembler cv.minu.sc.h
uint32_t __builtin_riscv_cv_simd_minu_sc_h (uint32_t, uint6_t) ¶Generated assembler cv.minu.sci.h
uint32_t __builtin_riscv_cv_simd_minu_sc_b (uint32_t, uint8_t) ¶Generated assembler cv.minu.sc.b
uint32_t __builtin_riscv_cv_simd_minu_sc_b (uint32_t, uint6_t) ¶Generated assembler cv.minu.sci.b
uint32_t __builtin_riscv_cv_simd_max_h (uint32_t, uint32_t) ¶Generated assembler cv.max.h
uint32_t __builtin_riscv_cv_simd_max_b (uint32_t, uint32_t) ¶Generated assembler cv.max.b
uint32_t __builtin_riscv_cv_simd_max_sc_h (uint32_t, int16_t) ¶Generated assembler cv.max.sc.h
uint32_t __builtin_riscv_cv_simd_max_sc_h (uint32_t, int6_t) ¶Generated assembler cv.max.sci.h
uint32_t __builtin_riscv_cv_simd_max_sc_b (uint32_t, int8_t) ¶Generated assembler cv.max.sc.b
uint32_t __builtin_riscv_cv_simd_max_sc_b (uint32_t, int6_t) ¶Generated assembler cv.max.sci.b
uint32_t __builtin_riscv_cv_simd_maxu_h (uint32_t, uint32_t) ¶Generated assembler cv.maxu.h
uint32_t __builtin_riscv_cv_simd_maxu_b (uint32_t, uint32_t) ¶Generated assembler cv.maxu.b
uint32_t __builtin_riscv_cv_simd_maxu_sc_h (uint32_t, uint16_t) ¶Generated assembler cv.maxu.sc.h
uint32_t __builtin_riscv_cv_simd_maxu_sc_h (uint32_t, uint6_t) ¶Generated assembler cv.maxu.sci.h
uint32_t __builtin_riscv_cv_simd_maxu_sc_b (uint32_t, uint8_t) ¶Generated assembler cv.maxu.sc.b
uint32_t __builtin_riscv_cv_simd_maxu_sc_b (uint32_t, uint6_t) ¶Generated assembler cv.maxu.sci.b
uint32_t __builtin_riscv_cv_simd_srl_h (uint32_t, uint32_t) ¶Generated assembler cv.srl.h
uint32_t __builtin_riscv_cv_simd_srl_b (uint32_t, uint32_t) ¶Generated assembler cv.srl.b
uint32_t __builtin_riscv_cv_simd_srl_sc_h (uint32_t, int16_t) ¶Generated assembler cv.srl.sc.h
uint32_t __builtin_riscv_cv_simd_srl_sc_h (uint32_t, int6_t) ¶Generated assembler cv.srl.sci.h
uint32_t __builtin_riscv_cv_simd_srl_sc_b (uint32_t, int8_t) ¶Generated assembler cv.srl.sc.b
uint32_t __builtin_riscv_cv_simd_srl_sc_b (uint32_t, int6_t) ¶Generated assembler cv.srl.sci.b
uint32_t __builtin_riscv_cv_simd_sra_h (uint32_t, uint32_t) ¶Generated assembler cv.sra.h
uint32_t __builtin_riscv_cv_simd_sra_b (uint32_t, uint32_t) ¶Generated assembler cv.sra.b
uint32_t __builtin_riscv_cv_simd_sra_sc_h (uint32_t, int16_t) ¶Generated assembler cv.sra.sc.h
uint32_t __builtin_riscv_cv_simd_sra_sc_h (uint32_t, int6_t) ¶Generated assembler cv.sra.sci.h
uint32_t __builtin_riscv_cv_simd_sra_sc_b (uint32_t, int8_t) ¶Generated assembler cv.sra.sc.b
uint32_t __builtin_riscv_cv_simd_sra_sc_b (uint32_t, int6_t) ¶Generated assembler cv.sra.sci.b
uint32_t __builtin_riscv_cv_simd_sll_h (uint32_t, uint32_t) ¶Generated assembler cv.sll.h
uint32_t __builtin_riscv_cv_simd_sll_b (uint32_t, uint32_t) ¶Generated assembler cv.sll.b
uint32_t __builtin_riscv_cv_simd_sll_sc_h (uint32_t, int16_t) ¶Generated assembler cv.sll.sc.h
uint32_t __builtin_riscv_cv_simd_sll_sc_h (uint32_t, int6_t) ¶Generated assembler cv.sll.sci.h
uint32_t __builtin_riscv_cv_simd_sll_sc_b (uint32_t, int8_t) ¶Generated assembler cv.sll.sc.b
uint32_t __builtin_riscv_cv_simd_sll_sc_b (uint32_t, int6_t) ¶Generated assembler cv.sll.sci.b
uint32_t __builtin_riscv_cv_simd_or_h (uint32_t, uint32_t) ¶Generated assembler cv.or.h
uint32_t __builtin_riscv_cv_simd_or_b (uint32_t, uint32_t) ¶Generated assembler cv.or.b
uint32_t __builtin_riscv_cv_simd_or_sc_h (uint32_t, int16_t) ¶Generated assembler cv.or.sc.h
uint32_t __builtin_riscv_cv_simd_or_sc_h (uint32_t, int6_t) ¶Generated assembler cv.or.sci.h
uint32_t __builtin_riscv_cv_simd_or_sc_b (uint32_t, int8_t) ¶Generated assembler cv.or.sc.b
uint32_t __builtin_riscv_cv_simd_or_sc_b (uint32_t, int6_t) ¶Generated assembler cv.or.sci.b
uint32_t __builtin_riscv_cv_simd_xor_h (uint32_t, uint32_t) ¶Generated assembler cv.xor.h
uint32_t __builtin_riscv_cv_simd_xor_b (uint32_t, uint32_t) ¶Generated assembler cv.xor.b
uint32_t __builtin_riscv_cv_simd_xor_sc_h (uint32_t, int16_t) ¶Generated assembler cv.xor.sc.h
uint32_t __builtin_riscv_cv_simd_xor_sc_h (uint32_t, int6_t) ¶Generated assembler cv.xor.sci.h
uint32_t __builtin_riscv_cv_simd_xor_sc_b (uint32_t, int8_t) ¶Generated assembler cv.xor.sc.b
uint32_t __builtin_riscv_cv_simd_xor_sc_b (uint32_t, int6_t) ¶Generated assembler cv.xor.sci.b
uint32_t __builtin_riscv_cv_simd_and_h (uint32_t, uint32_t) ¶Generated assembler cv.and.h
uint32_t __builtin_riscv_cv_simd_and_b (uint32_t, uint32_t) ¶Generated assembler cv.and.b
uint32_t __builtin_riscv_cv_simd_and_sc_h (uint32_t, int16_t) ¶Generated assembler cv.and.sc.h
uint32_t __builtin_riscv_cv_simd_and_sc_h (uint32_t, int6_t) ¶Generated assembler cv.and.sci.h
uint32_t __builtin_riscv_cv_simd_and_sc_b (uint32_t, int8_t) ¶Generated assembler cv.and.sc.b
uint32_t __builtin_riscv_cv_simd_and_sc_b (uint32_t, int6_t) ¶Generated assembler cv.and.sci.b
uint32_t __builtin_riscv_cv_simd_abs_h (uint32_t) ¶Generated assembler cv.abs.h
uint32_t __builtin_riscv_cv_simd_abs_b (uint32_t) ¶Generated assembler cv.abs.b
uint32_t __builtin_riscv_cv_simd_dotup_h (uint32_t, uint32_t) ¶Generated assembler cv.dotup.h
uint32_t __builtin_riscv_cv_simd_dotup_b (uint32_t, uint32_t) ¶Generated assembler cv.dotup.b
uint32_t __builtin_riscv_cv_simd_dotup_sc_h (uint32_t, uint16_t) ¶Generated assembler cv.dotup.sc.h
uint32_t __builtin_riscv_cv_simd_dotup_sc_h (uint32_t, uint6_t) ¶Generated assembler cv.dotup.sci.h
uint32_t __builtin_riscv_cv_simd_dotup_sc_b (uint32_t, uint8_t) ¶Generated assembler cv.dotup.sc.b
uint32_t __builtin_riscv_cv_simd_dotup_sc_b (uint32_t, uint6_t) ¶Generated assembler cv.dotup.sci.b
uint32_t __builtin_riscv_cv_simd_dotusp_h (uint32_t, uint32_t) ¶Generated assembler cv.dotusp.h
uint32_t __builtin_riscv_cv_simd_dotusp_b (uint32_t, uint32_t) ¶Generated assembler cv.dotusp.b
uint32_t __builtin_riscv_cv_simd_dotusp_sc_h (uint32_t, int16_t) ¶Generated assembler cv.dotusp.sc.h
uint32_t __builtin_riscv_cv_simd_dotusp_sc_h (uint32_t, int6_t) ¶Generated assembler cv.dotusp.sci.h
uint32_t __builtin_riscv_cv_simd_dotusp_sc_b (uint32_t, int8_t) ¶Generated assembler cv.dotusp.sc.b
uint32_t __builtin_riscv_cv_simd_dotusp_sc_b (uint32_t, int6_t) ¶Generated assembler cv.dotusp.sci.b
uint32_t __builtin_riscv_cv_simd_dotsp_h (uint32_t, uint32_t) ¶Generated assembler cv.dotsp.h
uint32_t __builtin_riscv_cv_simd_dotsp_b (uint32_t, uint32_t) ¶Generated assembler cv.dotsp.b
uint32_t __builtin_riscv_cv_simd_dotsp_sc_h (uint32_t, int16_t) ¶Generated assembler cv.dotsp.sc.h
uint32_t __builtin_riscv_cv_simd_dotsp_sc_h (uint32_t, int6_t) ¶Generated assembler cv.dotsp.sci.h
uint32_t __builtin_riscv_cv_simd_dotsp_sc_b (uint32_t, int8_t) ¶Generated assembler cv.dotsp.sc.b
uint32_t __builtin_riscv_cv_simd_dotsp_sc_b (uint32_t, int6_t) ¶Generated assembler cv.dotsp.sci.b
uint32_t __builtin_riscv_cv_simd_sdotup_h (uint32_t, uint32_t, uint32_t) ¶Generated assembler cv.sdotup.h
uint32_t __builtin_riscv_cv_simd_sdotup_b (uint32_t, uint32_t, uint32_t) ¶Generated assembler cv.sdotup.b
uint32_t __builtin_riscv_cv_simd_sdotup_sc_h (uint32_t, uint16_t, uint32_t) ¶Generated assembler cv.sdotup.sc.h
uint32_t __builtin_riscv_cv_simd_sdotup_sc_h (uint32_t, uint6_t, uint32_t) ¶Generated assembler cv.sdotup.sci.h
uint32_t __builtin_riscv_cv_simd_sdotup_sc_b (uint32_t, uint8_t, uint32_t) ¶Generated assembler cv.sdotup.sc.b
uint32_t __builtin_riscv_cv_simd_sdotup_sc_b (uint32_t, uint6_t, uint32_t) ¶Generated assembler cv.sdotup.sci.b
uint32_t __builtin_riscv_cv_simd_sdotusp_h (uint32_t, uint32_t, uint32_t) ¶Generated assembler cv.sdotusp.h
uint32_t __builtin_riscv_cv_simd_sdotusp_b (uint32_t, uint32_t, uint32_t) ¶Generated assembler cv.sdotusp.b
uint32_t __builtin_riscv_cv_simd_sdotusp_sc_h (uint32_t, int16_t, uint32_t) ¶Generated assembler cv.sdotusp.sc.h
uint32_t __builtin_riscv_cv_simd_sdotusp_sc_h (uint32_t, int6_t, uint32_t) ¶Generated assembler cv.sdotusp.sci.h
uint32_t __builtin_riscv_cv_simd_sdotusp_sc_b (uint32_t, int8_t, uint32_t) ¶Generated assembler cv.sdotusp.sc.b
uint32_t __builtin_riscv_cv_simd_sdotusp_sc_b (uint32_t, int6_t, uint32_t) ¶Generated assembler cv.sdotusp.sci.b
uint32_t __builtin_riscv_cv_simd_sdotsp_h (uint32_t, uint32_t, uint32_t) ¶Generated assembler cv.sdotsp.h
uint32_t __builtin_riscv_cv_simd_sdotsp_b (uint32_t, uint32_t, uint32_t) ¶Generated assembler cv.sdotsp.b
uint32_t __builtin_riscv_cv_simd_sdotsp_sc_h (uint32_t, int16_t, uint32_t) ¶Generated assembler cv.sdotsp.sc.h
uint32_t __builtin_riscv_cv_simd_sdotsp_sc_h (uint32_t, int6_t, uint32_t) ¶Generated assembler cv.sdotsp.sci.h
uint32_t __builtin_riscv_cv_simd_sdotsp_sc_b (uint32_t, int8_t, uint32_t) ¶Generated assembler cv.sdotsp.sc.b
uint32_t __builtin_riscv_cv_simd_sdotsp_sc_b (uint32_t, int6_t, uint32_t) ¶Generated assembler cv.sdotsp.sci.b
uint32_t __builtin_riscv_cv_simd_extract_h (uint32_t, uint6_t) ¶Generated assembler cv.extract.h
uint32_t __builtin_riscv_cv_simd_extract_b (uint32_t, uint6_t) ¶Generated assembler cv.extract.b
uint32_t __builtin_riscv_cv_simd_extractu_h (uint32_t, uint6_t) ¶Generated assembler cv.extractu.h
uint32_t __builtin_riscv_cv_simd_extractu_b (uint32_t, uint6_t) ¶Generated assembler cv.extractu.b
uint32_t __builtin_riscv_cv_simd_insert_h (uint32_t, uint32_t) ¶Generated assembler cv.insert.h
uint32_t __builtin_riscv_cv_simd_insert_b (uint32_t, uint32_t) ¶Generated assembler cv.insert.b
uint32_t __builtin_riscv_cv_simd_shuffle_h (uint32_t, uint32_t) ¶Generated assembler cv.shuffle.h
uint32_t __builtin_riscv_cv_simd_shuffle_b (uint32_t, uint32_t) ¶Generated assembler cv.shuffle.b
uint32_t __builtin_riscv_cv_simd_shuffle_sci_h (uint32_t, uint4_t) ¶Generated assembler cv.shuffle.sci.h
uint32_t __builtin_riscv_cv_simd_shufflei0_sci_b (uint32_t, uint4_t) ¶Generated assembler cv.shufflei0.sci.b
uint32_t __builtin_riscv_cv_simd_shufflei1_sci_b (uint32_t, uint4_t) ¶Generated assembler cv.shufflei1.sci.b
uint32_t __builtin_riscv_cv_simd_shufflei2_sci_b (uint32_t, uint4_t) ¶Generated assembler cv.shufflei2.sci.b
uint32_t __builtin_riscv_cv_simd_shufflei3_sci_b (uint32_t, uint4_t) ¶Generated assembler cv.shufflei3.sci.b
uint32_t __builtin_riscv_cv_simd_shuffle2_h (uint32_t, uint32_t, uint32_t) ¶Generated assembler cv.shuffle2.h
uint32_t __builtin_riscv_cv_simd_shuffle2_b (uint32_t, uint32_t, uint32_t) ¶Generated assembler cv.shuffle2.b
uint32_t __builtin_riscv_cv_simd_packlo_h (uint32_t, uint32_t) ¶Generated assembler cv.pack
uint32_t __builtin_riscv_cv_simd_packhi_h (uint32_t, uint32_t) ¶Generated assembler cv.pack.h
uint32_t __builtin_riscv_cv_simd_packhi_b (uint32_t, uint32_t, uint32_t) ¶Generated assembler cv.packhi.b
uint32_t __builtin_riscv_cv_simd_packlo_b (uint32_t, uint32_t, uint32_t) ¶Generated assembler cv.packlo.b
uint32_t __builtin_riscv_cv_simd_cmpeq_h (uint32_t, uint32_t) ¶Generated assembler cv.cmpeq.h
uint32_t __builtin_riscv_cv_simd_cmpeq_b (uint32_t, uint32_t) ¶Generated assembler cv.cmpeq.b
uint32_t __builtin_riscv_cv_simd_cmpeq_sc_h (uint32_t, int16_t) ¶Generated assembler cv.cmpeq.sc.h
uint32_t __builtin_riscv_cv_simd_cmpeq_sc_h (uint32_t, int6_t) ¶Generated assembler cv.cmpeq.sci.h
uint32_t __builtin_riscv_cv_simd_cmpeq_sc_b (uint32_t, int8_t) ¶Generated assembler cv.cmpeq.sc.b
uint32_t __builtin_riscv_cv_simd_cmpeq_sc_b (uint32_t, int6_t) ¶Generated assembler cv.cmpeq.sci.b
uint32_t __builtin_riscv_cv_simd_cmpne_h (uint32_t, uint32_t) ¶Generated assembler cv.cmpne.h
uint32_t __builtin_riscv_cv_simd_cmpne_b (uint32_t, uint32_t) ¶Generated assembler cv.cmpne.b
uint32_t __builtin_riscv_cv_simd_cmpne_sc_h (uint32_t, int16_t) ¶Generated assembler cv.cmpne.sc.h
uint32_t __builtin_riscv_cv_simd_cmpne_sc_h (uint32_t, int6_t) ¶Generated assembler cv.cmpne.sci.h
uint32_t __builtin_riscv_cv_simd_cmpne_sc_b (uint32_t, int8_t) ¶Generated assembler cv.cmpne.sc.b
uint32_t __builtin_riscv_cv_simd_cmpne_sc_b (uint32_t, int6_t) ¶Generated assembler cv.cmpne.sci.b
uint32_t __builtin_riscv_cv_simd_cmpgt_h (uint32_t, uint32_t) ¶Generated assembler cv.cmpgt.h
uint32_t __builtin_riscv_cv_simd_cmpgt_b (uint32_t, uint32_t) ¶Generated assembler cv.cmpgt.b
uint32_t __builtin_riscv_cv_simd_cmpgt_sc_h (uint32_t, int16_t) ¶Generated assembler cv.cmpgt.sc.h
uint32_t __builtin_riscv_cv_simd_cmpgt_sc_h (uint32_t, int6_t) ¶Generated assembler cv.cmpgt.sci.h
uint32_t __builtin_riscv_cv_simd_cmpgt_sc_b (uint32_t, int8_t) ¶Generated assembler cv.cmpgt.sc.b
uint32_t __builtin_riscv_cv_simd_cmpgt_sc_b (uint32_t, int6_t) ¶Generated assembler cv.cmpgt.sci.b
uint32_t __builtin_riscv_cv_simd_cmpge_h (uint32_t, uint32_t) ¶Generated assembler cv.cmpge.h
uint32_t __builtin_riscv_cv_simd_cmpge_b (uint32_t, uint32_t) ¶Generated assembler cv.cmpge.b
uint32_t __builtin_riscv_cv_simd_cmpge_sc_h (uint32_t, int16_t) ¶Generated assembler cv.cmpge.sc.h
uint32_t __builtin_riscv_cv_simd_cmpge_sc_h (uint32_t, int6_t) ¶Generated assembler cv.cmpge.sci.h
uint32_t __builtin_riscv_cv_simd_cmpge_sc_b (uint32_t, int8_t) ¶Generated assembler cv.cmpge.sc.b
uint32_t __builtin_riscv_cv_simd_cmpge_sc_b (uint32_t, int6_t) ¶Generated assembler cv.cmpge.sci.b
uint32_t __builtin_riscv_cv_simd_cmplt_h (uint32_t, uint32_t) ¶Generated assembler cv.cmplt.h
uint32_t __builtin_riscv_cv_simd_cmplt_b (uint32_t, uint32_t) ¶Generated assembler cv.cmplt.b
uint32_t __builtin_riscv_cv_simd_cmplt_sc_h (uint32_t, int16_t) ¶Generated assembler cv.cmplt.sc.h
uint32_t __builtin_riscv_cv_simd_cmplt_sc_h (uint32_t, int6_t) ¶Generated assembler cv.cmplt.sci.h
uint32_t __builtin_riscv_cv_simd_cmplt_sc_b (uint32_t, int8_t) ¶Generated assembler cv.cmplt.sc.b
uint32_t __builtin_riscv_cv_simd_cmplt_sc_b (uint32_t, int6_t) ¶Generated assembler cv.cmplt.sci.b
uint32_t __builtin_riscv_cv_simd_cmple_h (uint32_t, uint32_t) ¶Generated assembler cv.cmple.h
uint32_t __builtin_riscv_cv_simd_cmple_b (uint32_t, uint32_t) ¶Generated assembler cv.cmple.b
uint32_t __builtin_riscv_cv_simd_cmple_sc_h (uint32_t, int16_t) ¶Generated assembler cv.cmple.sc.h
uint32_t __builtin_riscv_cv_simd_cmple_sc_h (uint32_t, int6_t) ¶Generated assembler cv.cmple.sci.h
uint32_t __builtin_riscv_cv_simd_cmple_sc_b (uint32_t, int8_t) ¶Generated assembler cv.cmple.sc.b
uint32_t __builtin_riscv_cv_simd_cmple_sc_b (uint32_t, int6_t) ¶Generated assembler cv.cmple.sci.b
uint32_t __builtin_riscv_cv_simd_cmpgtu_h (uint32_t, uint32_t) ¶Generated assembler cv.cmpgtu.h
uint32_t __builtin_riscv_cv_simd_cmpgtu_b (uint32_t, uint32_t) ¶Generated assembler cv.cmpgtu.b
uint32_t __builtin_riscv_cv_simd_cmpgtu_sc_h (uint32_t, uint16_t) ¶Generated assembler cv.cmpgtu.sc.h
uint32_t __builtin_riscv_cv_simd_cmpgtu_sc_h (uint32_t, uint6_t) ¶Generated assembler cv.cmpgtu.sci.h
uint32_t __builtin_riscv_cv_simd_cmpgtu_sc_b (uint32_t, uint8_t) ¶Generated assembler cv.cmpgtu.sc.b
uint32_t __builtin_riscv_cv_simd_cmpgtu_sc_b (uint32_t, uint6_t) ¶Generated assembler cv.cmpgtu.sci.b
uint32_t __builtin_riscv_cv_simd_cmpgeu_h (uint32_t, uint32_t) ¶Generated assembler cv.cmpgeu.h
uint32_t __builtin_riscv_cv_simd_cmpgeu_b (uint32_t, uint32_t) ¶Generated assembler cv.cmpgeu.b
uint32_t __builtin_riscv_cv_simd_cmpgeu_sc_h (uint32_t, uint16_t) ¶Generated assembler cv.cmpgeu.sc.h
uint32_t __builtin_riscv_cv_simd_cmpgeu_sc_h (uint32_t, uint6_t) ¶Generated assembler cv.cmpgeu.sci.h
uint32_t __builtin_riscv_cv_simd_cmpgeu_sc_b (uint32_t, uint8_t) ¶Generated assembler cv.cmpgeu.sc.b
uint32_t __builtin_riscv_cv_simd_cmpgeu_sc_b (uint32_t, uint6_t) ¶Generated assembler cv.cmpgeu.sci.b
uint32_t __builtin_riscv_cv_simd_cmpltu_h (uint32_t, uint32_t) ¶Generated assembler cv.cmpltu.h
uint32_t __builtin_riscv_cv_simd_cmpltu_b (uint32_t, uint32_t) ¶Generated assembler cv.cmpltu.b
uint32_t __builtin_riscv_cv_simd_cmpltu_sc_h (uint32_t, uint16_t) ¶Generated assembler cv.cmpltu.sc.h
uint32_t __builtin_riscv_cv_simd_cmpltu_sc_h (uint32_t, uint6_t) ¶Generated assembler cv.cmpltu.sci.h
uint32_t __builtin_riscv_cv_simd_cmpltu_sc_b (uint32_t, uint8_t) ¶Generated assembler cv.cmpltu.sc.b
uint32_t __builtin_riscv_cv_simd_cmpltu_sc_b (uint32_t, uint6_t) ¶Generated assembler cv.cmpltu.sci.b
uint32_t __builtin_riscv_cv_simd_cmpleu_h (uint32_t, uint32_t) ¶Generated assembler cv.cmpleu.h
uint32_t __builtin_riscv_cv_simd_cmpleu_b (uint32_t, uint32_t) ¶Generated assembler cv.cmpleu.b
uint32_t __builtin_riscv_cv_simd_cmpleu_sc_h (uint32_t, uint16_t) ¶Generated assembler cv.cmpleu.sc.h
uint32_t __builtin_riscv_cv_simd_cmpleu_sc_h (uint32_t, uint6_t) ¶Generated assembler cv.cmpleu.sci.h
uint32_t __builtin_riscv_cv_simd_cmpleu_sc_b (uint32_t, uint8_t) ¶Generated assembler cv.cmpleu.sc.b
uint32_t __builtin_riscv_cv_simd_cmpleu_sc_b (uint32_t, uint6_t) ¶Generated assembler cv.cmpleu.sci.b
uint32_t __builtin_riscv_cv_simd_cplxmul_r (uint32_t, uint32_t, uint32_t, uint4_t) ¶Generated assembler cv.cplxmul.r
uint32_t __builtin_riscv_cv_simd_cplxmul_i (uint32_t, uint32_t, uint32_t, uint4_t) ¶Generated assembler cv.cplxmul.i
uint32_t __builtin_riscv_cv_simd_cplxmul_r (uint32_t, uint32_t, uint32_t, uint4_t) ¶Generated assembler cv.cplxmul.r.div2
uint32_t __builtin_riscv_cv_simd_cplxmul_i (uint32_t, uint32_t, uint32_t, uint4_t) ¶Generated assembler cv.cplxmul.i.div2
uint32_t __builtin_riscv_cv_simd_cplxmul_r (uint32_t, uint32_t, uint32_t, uint4_t) ¶Generated assembler cv.cplxmul.r.div4
uint32_t __builtin_riscv_cv_simd_cplxmul_i (uint32_t, uint32_t, uint32_t, uint4_t) ¶Generated assembler cv.cplxmul.i.div4
uint32_t __builtin_riscv_cv_simd_cplxmul_r (uint32_t, uint32_t, uint32_t, uint4_t) ¶Generated assembler cv.cplxmul.r.div8
uint32_t __builtin_riscv_cv_simd_cplxmul_i (uint32_t, uint32_t, uint32_t, uint4_t) ¶Generated assembler cv.cplxmul.i.div8
uint32_t __builtin_riscv_cv_simd_cplxconj (uint32_t) ¶Generated assembler cv.cplxconj
uint32_t __builtin_riscv_cv_simd_subrotmj (uint32_t, uint32_t, uint4_t) ¶Generated assembler cv.subrotmj
uint32_t __builtin_riscv_cv_simd_subrotmj (uint32_t, uint32_t, uint32_t, uint4_t) ¶Generated assembler cv.subrotmj.div2
uint32_t __builtin_riscv_cv_simd_subrotmj (uint32_t, uint32_t, uint32_t, uint4_t) ¶Generated assembler cv.subrotmj.div4
uint32_t __builtin_riscv_cv_simd_subrotmj (uint32_t, uint32_t, uint32_t, uint4_t) ¶Generated assembler cv.subrotmj.div8
uint32_t __builtin_riscv_cv_simd_add_h (uint32_t, uint32_t, uint32_t, uint4_t) ¶Generated assembler cv.add.div2
uint32_t __builtin_riscv_cv_simd_add_h (uint32_t, uint32_t, uint32_t, uint4_t) ¶Generated assembler cv.add.div4
uint32_t __builtin_riscv_cv_simd_add_h (uint32_t, uint32_t, uint32_t, uint4_t) ¶Generated assembler cv.add.div8
uint32_t __builtin_riscv_cv_simd_sub_h (uint32_t, uint32_t, uint32_t, uint4_t) ¶Generated assembler cv.sub.div2
uint32_t __builtin_riscv_cv_simd_sub_h (uint32_t, uint32_t, uint32_t, uint4_t) ¶Generated assembler cv.sub.div4
uint32_t __builtin_riscv_cv_simd_sub_h (uint32_t, uint32_t, uint32_t, uint4_t) ¶Generated assembler cv.sub.div8